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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-20 18:28:02 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-06-20 18:28:02 +0000 |
| commit | 7f67b3590168b88d69bc1ab067ad3075c7c28e62 (patch) | |
| tree | ed381c9f4e5b4984839168cae91ac0f66cabba13 /llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | |
| parent | e7a35539c5521985d75e89f3329a84fed09584e4 (diff) | |
| download | bcm5719-llvm-7f67b3590168b88d69bc1ab067ad3075c7c28e62.tar.gz bcm5719-llvm-7f67b3590168b88d69bc1ab067ad3075c7c28e62.zip | |
AMDGPU: Fix crash with undef vreg input operand
llvm-svn: 305814
Diffstat (limited to 'llvm/lib/Target/AMDGPU/SIFoldOperands.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/SIFoldOperands.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp index e10f1ed3762..bf6b7c55a69 100644 --- a/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp +++ b/llvm/lib/Target/AMDGPU/SIFoldOperands.cpp @@ -470,7 +470,7 @@ static MachineOperand *getImmOrMaterializedImm(MachineRegisterInfo &MRI, return &Op; MachineInstr *Def = MRI.getVRegDef(Op.getReg()); - if (Def->isMoveImmediate()) { + if (Def && Def->isMoveImmediate()) { MachineOperand &ImmSrc = Def->getOperand(1); if (ImmSrc.isImm()) return &ImmSrc; |
