summaryrefslogtreecommitdiffstats
path: root/llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
diff options
context:
space:
mode:
authorMatt Arsenault <Matthew.Arsenault@amd.com>2016-01-22 19:00:09 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2016-01-22 19:00:09 +0000
commit59bd3014f24004efd3a35132f04e4f82c2d37cec (patch)
tree5351c7a26c9b5ce6f2e98a94adced12b3c427fc8 /llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
parentbb4ff5f5b60a01c51ca9a298307f1f1303c666ab (diff)
downloadbcm5719-llvm-59bd3014f24004efd3a35132f04e4f82c2d37cec.tar.gz
bcm5719-llvm-59bd3014f24004efd3a35132f04e4f82c2d37cec.zip
AMDGPU: Rename some r600 intrinsics to use correct TargetPrefix
These ones aren't directly emitted by mesa and inserted by a pass. llvm-svn: 258523
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp12
1 files changed, 6 insertions, 6 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp b/llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
index 2fc7b02f673..e3a26f2af8d 100644
--- a/llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
+++ b/llvm/lib/Target/AMDGPU/R600TextureIntrinsicsReplacer.cpp
@@ -263,15 +263,15 @@ public:
StringRef Name = I.getCalledFunction()->getName();
if (Name == "llvm.AMDGPU.tex") {
- ReplaceTexIntrinsic(I, false, TexSign, "llvm.R600.tex", "llvm.R600.texc");
+ ReplaceTexIntrinsic(I, false, TexSign, "llvm.r600.tex", "llvm.r600.texc");
return;
}
if (Name == "llvm.AMDGPU.txl") {
- ReplaceTexIntrinsic(I, true, TexSign, "llvm.R600.txl", "llvm.R600.txlc");
+ ReplaceTexIntrinsic(I, true, TexSign, "llvm.r600.txl", "llvm.r600.txlc");
return;
}
if (Name == "llvm.AMDGPU.txb") {
- ReplaceTexIntrinsic(I, true, TexSign, "llvm.R600.txb", "llvm.R600.txbc");
+ ReplaceTexIntrinsic(I, true, TexSign, "llvm.r600.txb", "llvm.r600.txbc");
return;
}
if (Name == "llvm.AMDGPU.txf") {
@@ -279,15 +279,15 @@ public:
return;
}
if (Name == "llvm.AMDGPU.txq") {
- ReplaceTexIntrinsic(I, false, TexQSign, "llvm.R600.txq", "llvm.R600.txq");
+ ReplaceTexIntrinsic(I, false, TexQSign, "llvm.r600.txq", "llvm.r600.txq");
return;
}
if (Name == "llvm.AMDGPU.ddx") {
- ReplaceTexIntrinsic(I, false, TexSign, "llvm.R600.ddx", "llvm.R600.ddx");
+ ReplaceTexIntrinsic(I, false, TexSign, "llvm.r600.ddx", "llvm.r600.ddx");
return;
}
if (Name == "llvm.AMDGPU.ddy") {
- ReplaceTexIntrinsic(I, false, TexSign, "llvm.R600.ddy", "llvm.R600.ddy");
+ ReplaceTexIntrinsic(I, false, TexSign, "llvm.r600.ddy", "llvm.r600.ddy");
return;
}
}
OpenPOWER on IntegriCloud