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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-09 18:11:15 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-07-09 18:11:15 +0000 |
| commit | 52a4d9b4297832a51a75cdb57d0015ffb1899a63 (patch) | |
| tree | 5cda6b36e248d7455fb1786d7231855f59c6814d /llvm/lib/Target/AMDGPU/R600RegisterInfo.h | |
| parent | 48d70cb4862050446de3207ee22bba780c556a7e (diff) | |
| download | bcm5719-llvm-52a4d9b4297832a51a75cdb57d0015ffb1899a63.tar.gz bcm5719-llvm-52a4d9b4297832a51a75cdb57d0015ffb1899a63.zip | |
AMDGPU: Move R600 only pieces into R600 classes
llvm-svn: 274979
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600RegisterInfo.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600RegisterInfo.h | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600RegisterInfo.h b/llvm/lib/Target/AMDGPU/R600RegisterInfo.h index c1a1402ebe1..9dfb3106c6c 100644 --- a/llvm/lib/Target/AMDGPU/R600RegisterInfo.h +++ b/llvm/lib/Target/AMDGPU/R600RegisterInfo.h @@ -40,8 +40,13 @@ struct R600RegisterInfo final : public AMDGPURegisterInfo { const RegClassWeight & getRegClassWeight(const TargetRegisterClass *RC) const override; - // \returns true if \p Reg can be defined in one ALU caluse and used in another. + // \returns true if \p Reg can be defined in one ALU clause and used in + // another. bool isPhysRegLiveAcrossClauses(unsigned Reg) const; + + void eliminateFrameIndex(MachineBasicBlock::iterator MI, int SPAdj, + unsigned FIOperandNum, + RegScavenger *RS = nullptr) const override; }; } // End namespace llvm |
