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authorCraig Topper <craig.topper@gmail.com>2017-01-07 22:20:34 +0000
committerCraig Topper <craig.topper@gmail.com>2017-01-07 22:20:34 +0000
commita74e3088dfdc3bd0242dcfb3712a3eeea67ad150 (patch)
tree81f6e087e3b89fd3b3456e79ead8fb7b135c9ddf /llvm/lib/Target/AMDGPU/R600MachineFunctionInfo.h
parent2d02d4926be43b55856efd77d7d3e60c17ce5c07 (diff)
downloadbcm5719-llvm-a74e3088dfdc3bd0242dcfb3712a3eeea67ad150.tar.gz
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[AVX-512] Remove patterns from the other VBLENDM instructions. They are all redundant with masked move instructions.
We should probably teach the two address instruction pass to turn masked moves into BLENDM when its beneficial to the register allocator. llvm-svn: 291371
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