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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-08-13 01:43:46 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-08-13 01:43:46 +0000 |
| commit | 44f6d694b38a6294503da3464c778b021c2da42d (patch) | |
| tree | ec24d911e49a7d7c516efede6f297ab6460780f7 /llvm/lib/Target/AMDGPU/R600InstrInfo.h | |
| parent | 0dd9ed1d452e528cc0a8616cc185d9043afb76db (diff) | |
| download | bcm5719-llvm-44f6d694b38a6294503da3464c778b021c2da42d.tar.gz bcm5719-llvm-44f6d694b38a6294503da3464c778b021c2da42d.zip | |
AMDGPU/R600: Remove macros
llvm-svn: 278588
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600InstrInfo.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/R600InstrInfo.h | 17 |
1 files changed, 15 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/R600InstrInfo.h b/llvm/lib/Target/AMDGPU/R600InstrInfo.h index feaca98def4..d967b8afa50 100644 --- a/llvm/lib/Target/AMDGPU/R600InstrInfo.h +++ b/llvm/lib/Target/AMDGPU/R600InstrInfo.h @@ -19,6 +19,14 @@ #include "R600RegisterInfo.h" namespace llvm { + +namespace R600InstrFlags { +enum { + REGISTER_STORE = UINT64_C(1) << 62, + REGISTER_LOAD = UINT64_C(1) << 63 +}; +} + class AMDGPUTargetMachine; class DFAPacketizer; class MachineFunction; @@ -301,8 +309,13 @@ public: void clearFlag(MachineInstr &MI, unsigned Operand, unsigned Flag) const; // Helper functions that check the opcode for status information - bool isRegisterStore(const MachineInstr &MI) const; - bool isRegisterLoad(const MachineInstr &MI) const; + bool isRegisterStore(const MachineInstr &MI) const { + return get(MI.getOpcode()).TSFlags & R600InstrFlags::REGISTER_STORE; + } + + bool isRegisterLoad(const MachineInstr &MI) const { + return get(MI.getOpcode()).TSFlags & R600InstrFlags::REGISTER_LOAD; + } }; namespace AMDGPU { |
