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| author | Simon Tatham <simon.tatham@arm.com> | 2019-06-25 11:24:33 +0000 |
|---|---|---|
| committer | Simon Tatham <simon.tatham@arm.com> | 2019-06-25 11:24:33 +0000 |
| commit | 86b7a1e660b55d0082a671282523fa30cc9bff6a (patch) | |
| tree | 10381f792f5d4784c436ea499e24ed3a3fb0df3c /llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp | |
| parent | e6824160dd6f1edbeac8744a960ef7d3d2ae472a (diff) | |
| download | bcm5719-llvm-86b7a1e660b55d0082a671282523fa30cc9bff6a.tar.gz bcm5719-llvm-86b7a1e660b55d0082a671282523fa30cc9bff6a.zip | |
[ARM] Add remaining miscellaneous MVE instructions.
This final batch includes the tail-predicated versions of the
low-overhead loop instructions (LETP); the VPSEL instruction to select
between two vector registers based on the predicate mask without
having to open a VPT block; and VPNOT which complements the predicate
mask in place.
Reviewers: dmgreen, samparker, SjoerdMeijer, t.p.northover
Subscribers: javed.absar, kristof.beyls, hiraditya, llvm-commits
Tags: #llvm
Differential Revision: https://reviews.llvm.org/D62681
llvm-svn: 364292
Diffstat (limited to 'llvm/lib/Target/AMDGPU/R600ControlFlowFinalizer.cpp')
0 files changed, 0 insertions, 0 deletions
