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| author | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-06-21 16:00:54 +0000 |
|---|---|---|
| committer | Dmitry Preobrazhensky <dmitry.preobrazhensky@amd.com> | 2017-06-21 16:00:54 +0000 |
| commit | 851a3d9f051fa9fa3b4c44e6c342cc35a055c999 (patch) | |
| tree | f0387a0370166862f3d3dd14cd5360a839ef07a0 /llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | |
| parent | 2b053b1c28bd1df6475ae133766db2f52dd564e8 (diff) | |
| download | bcm5719-llvm-851a3d9f051fa9fa3b4c44e6c342cc35a055c999.tar.gz bcm5719-llvm-851a3d9f051fa9fa3b4c44e6c342cc35a055c999.zip | |
[AMDGPU][MC][GFX9] Corrected VOP3P relevant code to fix disassembler failures
See Bug 33509: https://bugs.llvm.org//show_bug.cgi?id=33509
Reviewers: Sam Kolton, Artem Tamazov, Valery Pykhtin
Differential Revision: https://reviews.llvm.org/D34360
llvm-svn: 305923
Diffstat (limited to 'llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 |
1 files changed, 0 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index ff0801e5d63..21da8b6b700 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -252,9 +252,7 @@ uint32_t SIMCCodeEmitter::getLitEncoding(const MCOperand &MO, case AMDGPU::OPERAND_REG_INLINE_C_V2INT16: case AMDGPU::OPERAND_REG_INLINE_C_V2FP16: { uint16_t Lo16 = static_cast<uint16_t>(Imm); - assert(Lo16 == static_cast<uint16_t>(Imm >> 16)); uint32_t Encoding = getLit16Encoding(Lo16, STI); - assert(Encoding != 255 && "packed constants can only be inline immediates"); return Encoding; } default: |
