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author | Tom Stellard <thomas.stellard@amd.com> | 2016-06-15 03:09:39 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2016-06-15 03:09:39 +0000 |
commit | 82785e9fe7bd12d2ca05d6bf626b0784cb4c9a23 (patch) | |
tree | 4f1f6ae94422f9b9e1ab84b30b1ed3d5dd617fb2 /llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | |
parent | e34ed833e50c279e2f25ce944404d3091ade5190 (diff) | |
download | bcm5719-llvm-82785e9fe7bd12d2ca05d6bf626b0784cb4c9a23.tar.gz bcm5719-llvm-82785e9fe7bd12d2ca05d6bf626b0784cb4c9a23.zip |
AMDGPU/SI: Correctly encode constant expressions
Summary:
We we have an MCConstantExpr, we can encode it directly into the instruction
instead of emitting fixups.
Reviewers: artem.tamazov, vpykhtin, SamWot, nhaustov, arsenm
Subscribers: arsenm, llvm-commits, kzhuravl
Differential Revision: http://reviews.llvm.org/D21236
Change-Id: I88b3edf288d48e65c5d705fc4850d281f8e36948
llvm-svn: 272750
Diffstat (limited to 'llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 32 |
1 files changed, 23 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index 52787b64f7e..71b585c25ac 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -162,20 +162,30 @@ static uint32_t getLit64Encoding(uint64_t Val) { uint32_t SIMCCodeEmitter::getLitEncoding(const MCOperand &MO, unsigned OpSize) const { - if (MO.isExpr()) - return 255; - assert(!MO.isFPImm()); + int64_t Imm; + if (MO.isExpr()) { + const MCConstantExpr *C = dyn_cast<MCConstantExpr>(MO.getExpr()); + if (!C) + return 255; + + Imm = C->getValue(); + } else { - if (!MO.isImm()) - return ~0; + assert(!MO.isFPImm()); + + if (!MO.isImm()) + return ~0; + + Imm = MO.getImm(); + } if (OpSize == 4) - return getLit32Encoding(static_cast<uint32_t>(MO.getImm())); + return getLit32Encoding(static_cast<uint32_t>(Imm)); assert(OpSize == 8); - return getLit64Encoding(static_cast<uint64_t>(MO.getImm())); + return getLit64Encoding(static_cast<uint64_t>(Imm)); } void SIMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, @@ -213,7 +223,11 @@ void SIMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, if (Op.isImm()) Imm = Op.getImm(); - else if (!Op.isExpr()) // Exprs will be replaced with a fixup value. + else if (Op.isExpr()) { + if (const MCConstantExpr *C = dyn_cast<MCConstantExpr>(Op.getExpr())) + Imm = C->getValue(); + + } else if (!Op.isExpr()) // Exprs will be replaced with a fixup value. llvm_unreachable("Must be immediate or expr"); for (unsigned j = 0; j < 4; j++) { @@ -247,7 +261,7 @@ uint64_t SIMCCodeEmitter::getMachineOpValue(const MCInst &MI, if (MO.isReg()) return MRI.getEncodingValue(MO.getReg()); - if (MO.isExpr()) { + if (MO.isExpr() && MO.getExpr()->getKind() != MCExpr::Constant) { const MCSymbolRefExpr *Expr = dyn_cast<MCSymbolRefExpr>(MO.getExpr()); MCFixupKind Kind; if (Expr && Expr->getSymbol().isExternal()) |