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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 01:42:04 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-02 01:42:04 +0000 |
| commit | 1d6317c3ad5d16355f2a261ff8bdda78f76357b5 (patch) | |
| tree | 66e66d0180ae362a09ce6a37e27acef860554341 /llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | |
| parent | 6ed7b9bfc09b98b0987c6d87bd250620050ff2d5 (diff) | |
| download | bcm5719-llvm-1d6317c3ad5d16355f2a261ff8bdda78f76357b5.tar.gz bcm5719-llvm-1d6317c3ad5d16355f2a261ff8bdda78f76357b5.zip | |
AMDGPU: Fix emitting encoded calls
This was failing on out of bounds access to the extra operands
on the s_swappc_b64 beyond those in the instruction definition.
This was working, but somehow regressed within the past few weeks,
although I don't see any obvious commit.
llvm-svn: 309782
Diffstat (limited to 'llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp index 376c9bfe5cc..94c0157edeb 100644 --- a/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp +++ b/llvm/lib/Target/AMDGPU/MCTargetDesc/SIMCCodeEmitter.cpp @@ -278,7 +278,7 @@ void SIMCCodeEmitter::encodeInstruction(const MCInst &MI, raw_ostream &OS, return; // Check for additional literals in SRC0/1/2 (Op 1/2/3) - for (unsigned i = 0, e = MI.getNumOperands(); i < e; ++i) { + for (unsigned i = 0, e = Desc.getNumOperands(); i < e; ++i) { // Check if this operand should be encoded as [SV]Src if (!AMDGPU::isSISrcOperand(Desc, i)) |
