diff options
| author | Sam Kolton <Sam.Kolton@amd.com> | 2016-03-09 12:29:31 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2016-03-09 12:29:31 +0000 |
| commit | dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6 (patch) | |
| tree | 5f7e7d7ac194e0510028d40818e6a734cff259f5 /llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h | |
| parent | 10d6f9ac0403710fefaee324bfccd2a01e41a6c3 (diff) | |
| download | bcm5719-llvm-dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6.tar.gz bcm5719-llvm-dfa29f7c5bfc45bcc9a31bb113b1519d1332b6a6.zip | |
[AMDGPU] Assembler: Support DPP instructions.
Supprot DPP syntax as used in SP3 (except several operands syntax).
Added dpp-specific operands in td-files.
Added DPP flag to TSFlags to determine if instruction is dpp in InstPrinter.
Support for VOP2 DPP instructions in td-files.
Some tests for DPP instructions.
ToDo:
- VOP2bInst:
- vcc is considered as operand
- AsmMatcher doesn't apply mnemonic aliases when parsing operands
- v_mac_f32
- v_nop
- disable instructions with 64-bit operands
- change dpp_ctrl assembler representation to conform sp3
Review: http://reviews.llvm.org/D17804
llvm-svn: 263008
Diffstat (limited to 'llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h index 13335a93926..7a1e86b0490 100644 --- a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h +++ b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.h @@ -33,8 +33,10 @@ public: const MCRegisterInfo &MRI); private: + void printU4ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printU8ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printU16ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); + void printU4ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printU8ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printU16ImmDecOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printU32ImmOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); @@ -61,6 +63,10 @@ private: void printImmediate64(uint64_t I, raw_ostream &O); void printOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); void printOperandAndMods(const MCInst *MI, unsigned OpNo, raw_ostream &O); + void printDPPCtrlOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); + void printRowMaskOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); + void printBankMaskOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); + void printBoundCtrlOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); static void printInterpSlot(const MCInst *MI, unsigned OpNum, raw_ostream &O); void printMemOperand(const MCInst *MI, unsigned OpNo, raw_ostream &O); static void printIfSet(const MCInst *MI, unsigned OpNo, raw_ostream &O, |
