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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-06-20 19:54:14 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-06-20 19:54:14 +0000
commit9698f1c862f734651838add7874db5750e9a67fa (patch)
tree01448f55f1eccc03eb8ce2cfe746fa7c11b5926e /llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
parent855a9e3e0609066e0cbeca664da183e624b60cac (diff)
downloadbcm5719-llvm-9698f1c862f734651838add7874db5750e9a67fa.tar.gz
bcm5719-llvm-9698f1c862f734651838add7874db5750e9a67fa.zip
AMDGPU: Start adding global_* instructions
llvm-svn: 305838
Diffstat (limited to 'llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
index b84640230ee..0b26a4fef43 100644
--- a/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/InstPrinter/AMDGPUInstPrinter.cpp
@@ -72,6 +72,11 @@ void AMDGPUInstPrinter::printU16ImmDecOperand(const MCInst *MI, unsigned OpNo,
O << formatDec(MI->getOperand(OpNo).getImm() & 0xffff);
}
+void AMDGPUInstPrinter::printS16ImmDecOperand(const MCInst *MI, unsigned OpNo,
+ raw_ostream &O) {
+ O << formatDec(static_cast<int16_t>(MI->getOperand(OpNo).getImm()));
+}
+
void AMDGPUInstPrinter::printU32ImmOperand(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI,
raw_ostream &O) {
@@ -118,6 +123,16 @@ void AMDGPUInstPrinter::printOffset(const MCInst *MI, unsigned OpNo,
}
}
+void AMDGPUInstPrinter::printOffsetS13(const MCInst *MI, unsigned OpNo,
+ const MCSubtargetInfo &STI,
+ raw_ostream &O) {
+ uint16_t Imm = MI->getOperand(OpNo).getImm();
+ if (Imm != 0) {
+ O << ((OpNo == 0)? "offset:" : " offset:");
+ printS16ImmDecOperand(MI, OpNo, O);
+ }
+}
+
void AMDGPUInstPrinter::printOffset0(const MCInst *MI, unsigned OpNo,
const MCSubtargetInfo &STI,
raw_ostream &O) {
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