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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-06-10 02:18:02 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-06-10 02:18:02 +0000 |
| commit | 37fefd68cc7a0960cd5c4067a26a6c8e5930439e (patch) | |
| tree | e18ba1b58b2f4b949b57b82b4cdb2a9aa6e1fce2 /llvm/lib/Target/AMDGPU/Disassembler | |
| parent | a4a7220db1da747fdd231debe737cd7deb327ffe (diff) | |
| download | bcm5719-llvm-37fefd68cc7a0960cd5c4067a26a6c8e5930439e.tar.gz bcm5719-llvm-37fefd68cc7a0960cd5c4067a26a6c8e5930439e.zip | |
AMDGPU: Fix trailing whitespace
llvm-svn: 272364
Diffstat (limited to 'llvm/lib/Target/AMDGPU/Disassembler')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp index f96bb5e4c77..e11de855fe5 100644 --- a/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp +++ b/llvm/lib/Target/AMDGPU/Disassembler/AMDGPUDisassembler.cpp @@ -124,7 +124,7 @@ DecodeStatus AMDGPUDisassembler::getInstruction(MCInst &MI, uint64_t &Size, do { // ToDo: better to switch encoding length using some bit predicate // but it is unknown yet, so try all we can - + // Try to decode DPP and SDWA first to solve conflict with VOP1 and VOP2 // encodings if (Bytes.size() >= 8) { |
