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| author | Sam Kolton <Sam.Kolton@amd.com> | 2017-01-20 10:01:25 +0000 |
|---|---|---|
| committer | Sam Kolton <Sam.Kolton@amd.com> | 2017-01-20 10:01:25 +0000 |
| commit | 07dbde214b70507f31683e62ea66d396bd0f05a8 (patch) | |
| tree | 6e904dc614618511141d3d4fe2d382ea553ce008 /llvm/lib/Target/AMDGPU/AsmParser | |
| parent | def8f90e67426105fa131d3b230039e12d9c0cce (diff) | |
| download | bcm5719-llvm-07dbde214b70507f31683e62ea66d396bd0f05a8.tar.gz bcm5719-llvm-07dbde214b70507f31683e62ea66d396bd0f05a8.zip | |
[AMDGPU] Add subtarget features for SDWA/DPP
Reviewers: vpykhtin, artem.tamazov, tstellarAMD
Subscribers: arsenm, kzhuravl, wdng, nhaehnle, yaxunl, tony-tye
Differential Revision: https://reviews.llvm.org/D28900
llvm-svn: 292596
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 2 |
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index ec0a8e99206..425fd529e1b 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -3442,7 +3442,7 @@ void AMDGPUAsmParser::cvtDPP(MCInst &Inst, const OperandVector &Operands) { AMDGPUOperand &Op = ((AMDGPUOperand &)*Operands[I]); // Add the register arguments if (Op.isReg() && Op.Reg.RegNo == AMDGPU::VCC) { - // VOP2b (v_add_u32, v_sub_u32 ...) sdwa use "vcc" token. + // VOP2b (v_add_u32, v_sub_u32 ...) dpp use "vcc" token. // Skip it. continue; } if (isRegOrImmWithInputMods(Desc, Inst.getNumOperands())) { |
