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| author | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2017-02-27 07:55:17 +0000 |
|---|---|---|
| committer | Konstantin Zhuravlyov <kzhuravl_dev@outlook.com> | 2017-02-27 07:55:17 +0000 |
| commit | 972948b36eecc591cff85391bf11635750c1c88e (patch) | |
| tree | 8ab64d2de4b2a745e0dbfd18bea623103fba2189 /llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | |
| parent | 50aa37b96cf9686b87ef675f3614ab5980e33d3b (diff) | |
| download | bcm5719-llvm-972948b36eecc591cff85391bf11635750c1c88e.tar.gz bcm5719-llvm-972948b36eecc591cff85391bf11635750c1c88e.zip | |
[AMDGPU] Runtime metadata fixes:
- Verify that runtime metadata is actually valid runtime metadata when assembling, otherwise we could accept the following when assembling, but ocl runtime will reject it:
.amdgpu_runtime_metadata
{ amd.MDVersion: [ 2, 1 ], amd.RandomUnknownKey, amd.IsaInfo: ...
- Make IsaInfo optional, and always emit it.
Differential Revision: https://reviews.llvm.org/D30349
llvm-svn: 296324
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 23 |
1 files changed, 14 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 0f0e0ab68c9..b2135d518d1 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -789,12 +789,12 @@ public: : MCTargetAsmParser(Options, STI), MII(MII), Parser(_Parser) { MCAsmParserExtension::Initialize(Parser); - if (getSTI().getFeatureBits().none()) { + if (getFeatureBits().none()) { // Set default features. copySTI().ToggleFeature("SOUTHERN_ISLANDS"); } - setAvailableFeatures(ComputeAvailableFeatures(getSTI().getFeatureBits())); + setAvailableFeatures(ComputeAvailableFeatures(getFeatureBits())); { // TODO: make those pre-defined variables read-only. @@ -802,7 +802,7 @@ public: // MCSymbol::isRedefinable is intended for another purpose, and // AsmParser::parseDirectiveSet() cannot be specialized for specific target. AMDGPU::IsaInfo::IsaVersion ISA = - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits()); + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits()); MCContext &Ctx = getContext(); MCSymbol *Sym = Ctx.getOrCreateSymbol(Twine(".option.machine_version_major")); @@ -828,7 +828,7 @@ public: } bool hasInv2PiInlineImm() const { - return getSTI().getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]; + return getFeatureBits()[AMDGPU::FeatureInv2PiInlineImm]; } bool hasSGPR102_SGPR103() const { @@ -850,6 +850,10 @@ public: return &MII; } + const FeatureBitset &getFeatureBits() const { + return getSTI().getFeatureBits(); + } + void setForcedEncodingSize(unsigned Size) { ForcedEncodingSize = Size; } void setForcedDPP(bool ForceDPP_) { ForcedDPP = ForceDPP_; } void setForcedSDWA(bool ForceSDWA_) { ForcedSDWA = ForceSDWA_; } @@ -1870,7 +1874,7 @@ bool AMDGPUAsmParser::ParseDirectiveHSACodeObjectISA() { // targeted GPU. if (getLexer().is(AsmToken::EndOfStatement)) { AMDGPU::IsaInfo::IsaVersion ISA = - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits()); + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits()); getTargetStreamer().EmitDirectiveHSACodeObjectISA(ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU"); @@ -1947,7 +1951,8 @@ bool AMDGPUAsmParser::ParseDirectiveRuntimeMetadata() { MS.flush(); - getTargetStreamer().EmitRuntimeMetadata(Metadata); + if (getTargetStreamer().EmitRuntimeMetadata(getFeatureBits(), Metadata)) + return Error(getParser().getTok().getLoc(), "invalid runtime metadata"); return false; } @@ -1965,7 +1970,7 @@ bool AMDGPUAsmParser::ParseAMDKernelCodeTValue(StringRef ID, bool AMDGPUAsmParser::ParseDirectiveAMDKernelCodeT() { amd_kernel_code_t Header; - AMDGPU::initDefaultAMDKernelCodeT(Header, getSTI().getFeatureBits()); + AMDGPU::initDefaultAMDKernelCodeT(Header, getFeatureBits()); while (true) { // Lex EndOfStatement. This is in a while loop, because lexing a comment @@ -2459,7 +2464,7 @@ bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) { Parser.Lex(); AMDGPU::IsaInfo::IsaVersion ISA = - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits()); + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits()); if (CntName == "vmcnt") IntVal = encodeVmcnt(ISA, IntVal, CntVal); else if (CntName == "expcnt") @@ -2475,7 +2480,7 @@ bool AMDGPUAsmParser::parseCnt(int64_t &IntVal) { OperandMatchResultTy AMDGPUAsmParser::parseSWaitCntOps(OperandVector &Operands) { AMDGPU::IsaInfo::IsaVersion ISA = - AMDGPU::IsaInfo::getIsaVersion(getSTI().getFeatureBits()); + AMDGPU::IsaInfo::getIsaVersion(getFeatureBits()); int64_t Waitcnt = getWaitcntBitMask(ISA); SMLoc S = Parser.getTok().getLoc(); |

