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author | Ranjeet Singh <Ranjeet.Singh@arm.com> | 2015-06-30 11:30:42 +0000 |
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committer | Ranjeet Singh <Ranjeet.Singh@arm.com> | 2015-06-30 11:30:42 +0000 |
commit | 5b119091a130c2a09e9128b9e874efabb7c9c69f (patch) | |
tree | f948f236beaf848c46c2c5d410bcb04f020682cf /llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | |
parent | f256184693d166f23eb2d0ed6379e9348909c7d2 (diff) | |
download | bcm5719-llvm-5b119091a130c2a09e9128b9e874efabb7c9c69f.tar.gz bcm5719-llvm-5b119091a130c2a09e9128b9e874efabb7c9c69f.zip |
There are a few places where subtarget features are still
represented by uint64_t, this patch replaces these
usages with the FeatureBitset (std::bitset) type.
Differential Revision: http://reviews.llvm.org/D10542
llvm-svn: 241058
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp | 5 |
1 files changed, 4 insertions, 1 deletions
diff --git a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp index 2018983bc30..1fd9a83a984 100644 --- a/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp +++ b/llvm/lib/Target/AMDGPU/AsmParser/AMDGPUAsmParser.cpp @@ -361,6 +361,7 @@ public: bool MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, + FeatureBitset &ErrorMissingFeature, bool MatchingInlineAsm) override; bool ParseDirective(AsmToken DirectiveID) override; OperandMatchResultTy parseOperand(OperandVector &Operands, StringRef Mnemonic); @@ -542,10 +543,11 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, OperandVector &Operands, MCStreamer &Out, uint64_t &ErrorInfo, + FeatureBitset &ErrorMissingFeature, bool MatchingInlineAsm) { MCInst Inst; - switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, MatchingInlineAsm)) { + switch (MatchInstructionImpl(Operands, Inst, ErrorInfo, ErrorMissingFeature, MatchingInlineAsm)) { default: break; case Match_Success: Inst.setLoc(IDLoc); @@ -577,6 +579,7 @@ bool AMDGPUAsmParser::MatchAndEmitInstruction(SMLoc IDLoc, unsigned &Opcode, AMDGPUOperand::ImmTyOMod)); bool Res = MatchAndEmitInstruction(IDLoc, Opcode, Operands, Out, ErrorInfo, + ErrorMissingFeature, MatchingInlineAsm); if (!Res) return Res; |