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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-23 03:58:53 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-02-23 03:58:53 +0000 |
commit | f0a88dbaab5699252c9eb20cac3f23f634e76fa7 (patch) | |
tree | 68b8deea78f0d4842c6a2a90276adcced5ad44bb /llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | |
parent | c8d0c7a0e3842bc0223aa3e0a3cb21f0fcdb999b (diff) | |
download | bcm5719-llvm-f0a88dbaab5699252c9eb20cac3f23f634e76fa7.tar.gz bcm5719-llvm-f0a88dbaab5699252c9eb20cac3f23f634e76fa7.zip |
LoadStoreVectorizer: Split even sized illegal chains properly
Implement isLegalToVectorizeLoadChain for AMDGPU to avoid
producing private address spaces accesses that will need to be
split up later. This was doing the wrong thing in the case
where the queried chain was an even number of elements.
A possible <4 x i32> store was being split into
store <2 x i32>
store i32
store i32
rather than
store <2 x i32>
store <2 x i32>
when legal.
llvm-svn: 295933
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h | 11 |
1 files changed, 11 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h index 3f72a63679f..c64c4bf5f6a 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h @@ -78,6 +78,17 @@ public: unsigned getNumberOfRegisters(bool Vector); unsigned getRegisterBitWidth(bool Vector); unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const; + + bool isLegalToVectorizeMemChain(unsigned ChainSizeInBytes, + unsigned Alignment, + unsigned AddrSpace) const; + bool isLegalToVectorizeLoadChain(unsigned ChainSizeInBytes, + unsigned Alignment, + unsigned AddrSpace) const; + bool isLegalToVectorizeStoreChain(unsigned ChainSizeInBytes, + unsigned Alignment, + unsigned AddrSpace) const; + unsigned getMaxInterleaveFactor(unsigned VF); int getArithmeticInstrCost( |