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authorEugene Zelenko <eugene.zelenko@gmail.com>2017-08-08 23:53:55 +0000
committerEugene Zelenko <eugene.zelenko@gmail.com>2017-08-08 23:53:55 +0000
commitd16eff816b876aac959dbd45dc78d41a06f966ad (patch)
treea306e9d295d76377cc82b0c802277d5d02e30a14 /llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
parente5a9d9f17c1c577075e8a905618b2216d903b6f9 (diff)
downloadbcm5719-llvm-d16eff816b876aac959dbd45dc78d41a06f966ad.tar.gz
bcm5719-llvm-d16eff816b876aac959dbd45dc78d41a06f966ad.zip
[AMDGPU] Fix some Clang-tidy modernize-use-using and Include What You Use warnings; other minor fixes (NFC).
llvm-svn: 310429
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h28
1 files changed, 20 insertions, 8 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
index 5c0e0297f2c..a5225f68af9 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.h
@@ -1,4 +1,4 @@
-//===-- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI -------*- C++ -*-===//
+//===- AMDGPUTargetTransformInfo.h - AMDGPU specific TTI --------*- C++ -*-===//
//
// The LLVM Compiler Infrastructure
//
@@ -6,35 +6,48 @@
// License. See LICENSE.TXT for details.
//
//===----------------------------------------------------------------------===//
+//
/// \file
/// This file a TargetTransformInfo::Concept conforming object specific to the
/// AMDGPU target machine. It uses the target's detailed information to
/// provide more precise answers to certain TTI queries, while letting the
/// target independent and default TTI implementations handle the rest.
-///
+//
//===----------------------------------------------------------------------===//
#ifndef LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETTRANSFORMINFO_H
#define LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETTRANSFORMINFO_H
#include "AMDGPU.h"
+#include "AMDGPUSubtarget.h"
#include "AMDGPUTargetMachine.h"
+#include "Utils/AMDGPUBaseInfo.h"
+#include "llvm/ADT/ArrayRef.h"
#include "llvm/Analysis/TargetTransformInfo.h"
#include "llvm/CodeGen/BasicTTIImpl.h"
+#include "llvm/IR/Function.h"
+#include "llvm/MC/SubtargetFeature.h"
+#include "llvm/Support/MathExtras.h"
+#include <cassert>
namespace llvm {
+
class AMDGPUTargetLowering;
+class Loop;
+class ScalarEvolution;
+class Type;
+class Value;
class AMDGPUTTIImpl final : public BasicTTIImplBase<AMDGPUTTIImpl> {
- typedef BasicTTIImplBase<AMDGPUTTIImpl> BaseT;
- typedef TargetTransformInfo TTI;
+ using BaseT = BasicTTIImplBase<AMDGPUTTIImpl>;
+ using TTI = TargetTransformInfo;
+
friend BaseT;
const AMDGPUSubtarget *ST;
const AMDGPUTargetLowering *TLI;
bool IsGraphicsShader;
-
const FeatureBitset InlineFeatureIgnoreList = {
// Codegen control options which don't matter.
AMDGPU::FeatureEnableLoadStoreOpt,
@@ -63,7 +76,6 @@ class AMDGPUTTIImpl final : public BasicTTIImplBase<AMDGPUTTIImpl> {
const AMDGPUSubtarget *getST() const { return ST; }
const AMDGPUTargetLowering *getTLI() const { return TLI; }
-
static inline int getFullRateInstrCost() {
return TargetTransformInfo::TCC_Basic;
}
@@ -104,7 +116,7 @@ public:
unsigned getHardwareNumberOfRegisters(bool Vector) const;
unsigned getNumberOfRegisters(bool Vector) const;
- unsigned getRegisterBitWidth(bool Vector) const ;
+ unsigned getRegisterBitWidth(bool Vector) const;
unsigned getMinVectorRegisterBitWidth() const;
unsigned getLoadStoreVecRegBitWidth(unsigned AddrSpace) const;
@@ -154,4 +166,4 @@ public:
} // end namespace llvm
-#endif
+#endif // LLVM_LIB_TARGET_AMDGPU_AMDGPUTARGETTRANSFORMINFO_H
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