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author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-07 17:08:44 +0000 |
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committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2017-08-07 17:08:44 +0000 |
commit | aac47c1c008c0c8f2312541e0a9954ad1f60b15d (patch) | |
tree | 0ebbd6ce6760097d710a4bb0f0145aa1ae9494da /llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | |
parent | 0242cead2c10b3cdbefc197aaafc87cd7cce0b7c (diff) | |
download | bcm5719-llvm-aac47c1c008c0c8f2312541e0a9954ad1f60b15d.tar.gz bcm5719-llvm-aac47c1c008c0c8f2312541e0a9954ad1f60b15d.zip |
AMDGPU: Use a custom areInlineCompatible
Fixes not inlining OpenCL library functions on AMDGPU,
which don't have an explicitly set target-cpu.
llvm-svn: 310269
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp | 13 |
1 files changed, 13 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp index 89a03902dc6..fde2132b40b 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetTransformInfo.cpp @@ -534,3 +534,16 @@ unsigned AMDGPUTTIImpl::getShuffleCost(TTI::ShuffleKind Kind, Type *Tp, int Inde return BaseT::getShuffleCost(Kind, Tp, Index, SubTp); } + +bool AMDGPUTTIImpl::areInlineCompatible(const Function *Caller, + const Function *Callee) const { + const TargetMachine &TM = getTLI()->getTargetMachine(); + const FeatureBitset &CallerBits = + TM.getSubtargetImpl(*Caller)->getFeatureBits(); + const FeatureBitset &CalleeBits = + TM.getSubtargetImpl(*Callee)->getFeatureBits(); + + FeatureBitset RealCallerBits = CallerBits & ~InlineFeatureIgnoreList; + FeatureBitset RealCalleeBits = CalleeBits & ~InlineFeatureIgnoreList; + return ((RealCallerBits & RealCalleeBits) == RealCalleeBits); +} |