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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-06 16:20:41 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2016-10-06 16:20:41 +0000 |
| commit | 6bc43d8627ca44465e7ce261a0828b70d3460e13 (patch) | |
| tree | 255944724c060d2eef50f0ccf04df7546aca245c /llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | |
| parent | d391d6f1c32d7316cb7fa8cfa4e039f94133ccbe (diff) | |
| download | bcm5719-llvm-6bc43d8627ca44465e7ce261a0828b70d3460e13.tar.gz bcm5719-llvm-6bc43d8627ca44465e7ce261a0828b70d3460e13.zip | |
BranchRelaxation: Support expanding unconditional branches
AMDGPU needs to expand unconditional branches in a new
block with an indirect branch.
llvm-svn: 283464
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp index a6232ad8128..bc436d7ae42 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUTargetMachine.cpp @@ -602,6 +602,7 @@ void GCNPassConfig::addPreEmitPass() { addPass(createSIShrinkInstructionsPass()); addPass(&SIInsertSkipsPassID); addPass(createSIDebuggerInsertNopsPass()); + addPass(&BranchRelaxationPassID); } TargetPassConfig *GCNTargetMachine::createPassConfig(PassManagerBase &PM) { |
