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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-05-10 21:19:05 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-05-10 21:19:05 +0000
commitacdc7659cc274a46dfef4db5ccdfcafadfda71c4 (patch)
tree7eba4bb280cf6437d7ec46ce70f59f5f04a0376b /llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
parentac831d35cfe7d2918ea539f969d323cc40b880e7 (diff)
downloadbcm5719-llvm-acdc7659cc274a46dfef4db5ccdfcafadfda71c4.tar.gz
bcm5719-llvm-acdc7659cc274a46dfef4db5ccdfcafadfda71c4.zip
AMDGPU: Add new subtarget features for gfx9 flat instructions
Flat instructions gain an immediate offset, and 2 new sets of segment specific flat instructions are added. llvm-svn: 302729
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h15
1 files changed, 15 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index a5cda817ac1..bed7d326b3d 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -145,6 +145,9 @@ protected:
bool HasSDWA;
bool HasDPP;
bool FlatAddressSpace;
+ bool FlatInstOffsets;
+ bool FlatGlobalInsts;
+ bool FlatScratchInsts;
bool R600ALUInst;
bool CaymanISA;
bool CFALUBug;
@@ -380,6 +383,18 @@ public:
return FlatAddressSpace;
}
+ bool hasFlatInstOffsets() const {
+ return FlatInstOffsets;
+ }
+
+ bool hasFlatGlobalInsts() const {
+ return FlatGlobalInsts;
+ }
+
+ bool hasFlatScratchInsts() const {
+ return FlatScratchInsts;
+ }
+
bool isMesaKernel(const MachineFunction &MF) const {
return isMesa3DOS() && !AMDGPU::isShader(MF.getFunction()->getCallingConv());
}
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