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authorMatt Arsenault <Matthew.Arsenault@amd.com>2017-01-23 22:31:03 +0000
committerMatt Arsenault <Matthew.Arsenault@amd.com>2017-01-23 22:31:03 +0000
commita6867fd441a14d9aa9a1a04085a7d0d5ec34d6eb (patch)
tree108d7d49ad789acdc34b4cbb1072583140208240 /llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
parentf86d385813f9cd36bef50eeae7c58e7539a81e4d (diff)
downloadbcm5719-llvm-a6867fd441a14d9aa9a1a04085a7d0d5ec34d6eb.tar.gz
bcm5719-llvm-a6867fd441a14d9aa9a1a04085a7d0d5ec34d6eb.zip
AMDGPU: Combine fp16/fp64 subtarget features
The same control register controls both, and are set to the same defaults. Keep the old names around as aliases. llvm-svn: 292837
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h7
1 files changed, 3 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
index 26c4c34c988..c8414f97808 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h
@@ -81,9 +81,8 @@ protected:
bool HalfRate64Ops;
// Dynamially set bits that enable features.
- bool FP16Denormals;
bool FP32Denormals;
- bool FP64Denormals;
+ bool FP64FP16Denormals;
bool FPExceptions;
bool FlatForGlobal;
bool UnalignedScratchAccess;
@@ -282,7 +281,7 @@ public:
unsigned getOccupancyWithLocalMemSize(uint32_t Bytes) const;
bool hasFP16Denormals() const {
- return FP16Denormals;
+ return FP64FP16Denormals;
}
bool hasFP32Denormals() const {
@@ -290,7 +289,7 @@ public:
}
bool hasFP64Denormals() const {
- return FP64Denormals;
+ return FP64FP16Denormals;
}
bool hasFPExceptions() const {
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