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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-05 18:24:34 +0000 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-04-05 18:24:34 +0000 |
| commit | 7895c0323293e1c678657e9fd6990fe59b62a1f5 (patch) | |
| tree | bc970ef2052cfca93655fd371422b1618ffa04d6 /llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | |
| parent | 6eb7ab97a58d30f17068ac1b4e7c0da49b3817aa (diff) | |
| download | bcm5719-llvm-7895c0323293e1c678657e9fd6990fe59b62a1f5.tar.gz bcm5719-llvm-7895c0323293e1c678657e9fd6990fe59b62a1f5.zip | |
[AMDGPU] predicate and feature refactoring
We have done some predicate and feature refactoring lately but
did not upstream it. This is to sync.
Differential revision: https://reviews.llvm.org/D60292
llvm-svn: 357791
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h | 12 |
1 files changed, 7 insertions, 5 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h index a92b8fee577..df091655afd 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h +++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.h @@ -311,8 +311,9 @@ protected: bool IsGCN; bool GCN3Encoding; bool CIInsts; - bool VIInsts; + bool GFX8Insts; bool GFX9Insts; + bool GFX7GFX8GFX9Insts; bool SGPRInitBug; bool HasSMemRealTime; bool HasIntClamp; @@ -770,7 +771,7 @@ public: } bool hasLDSFPAtomics() const { - return VIInsts; + return GFX8Insts; } bool hasDPP() const { @@ -803,15 +804,16 @@ public: } bool hasSMovFedHazard() const { - return getGeneration() >= AMDGPUSubtarget::GFX9; + return getGeneration() == AMDGPUSubtarget::GFX9; } bool hasReadM0MovRelInterpHazard() const { - return getGeneration() >= AMDGPUSubtarget::GFX9; + return getGeneration() == AMDGPUSubtarget::GFX9; } bool hasReadM0SendMsgHazard() const { - return getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS; + return getGeneration() >= AMDGPUSubtarget::VOLCANIC_ISLANDS && + getGeneration() <= AMDGPUSubtarget::GFX9; } /// Return the maximum number of waves per SIMD for kernels using \p SGPRs |
