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authorStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2020-01-09 14:28:49 -0800
committerStanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com>2020-01-09 15:56:36 -0800
commitcd69e4c74c174101817c9f6b7c02374ac6a7476f (patch)
tree440809523017fe6e7f0c29015e9d0178e63ac72f /llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
parentb81c8c6976b987a25fc54fa2bf3524919759a898 (diff)
downloadbcm5719-llvm-cd69e4c74c174101817c9f6b7c02374ac6a7476f.tar.gz
bcm5719-llvm-cd69e4c74c174101817c9f6b7c02374ac6a7476f.zip
[AMDGPU] Fix bundle scheduling
Bundles coming to scheduler considered free, i.e. zero latency. Fixed. Differential Revision: https://reviews.llvm.org/D72487
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp')
-rw-r--r--llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp40
1 files changed, 40 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
index 9a726c320ff..46aea16a2be 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUSubtarget.cpp
@@ -755,6 +755,45 @@ struct MemOpClusterMutation : ScheduleDAGMutation {
}
};
+struct FixBundleLatencyMutation : ScheduleDAGMutation {
+ const SIInstrInfo *TII;
+
+ const TargetSchedModel *TSchedModel;
+
+ FixBundleLatencyMutation(const SIInstrInfo *tii) : TII(tii) {}
+
+ unsigned computeLatency(const MachineInstr &MI, unsigned Reg) const {
+ const SIRegisterInfo &TRI = TII->getRegisterInfo();
+ MachineBasicBlock::const_instr_iterator I(MI.getIterator());
+ MachineBasicBlock::const_instr_iterator E(MI.getParent()->instr_end());
+ unsigned Lat = 0;
+ for (++I; I != E && I->isBundledWithPred(); ++I) {
+ if (!I->modifiesRegister(Reg, &TRI))
+ continue;
+ Lat = TSchedModel->computeInstrLatency(&*I);
+ break;
+ }
+ return Lat;
+ }
+
+ void apply(ScheduleDAGInstrs *DAGInstrs) override {
+ ScheduleDAGMI *DAG = static_cast<ScheduleDAGMI*>(DAGInstrs);
+ TSchedModel = DAGInstrs->getSchedModel();
+ if (!TSchedModel || DAG->SUnits.empty())
+ return;
+
+ for (SUnit &SU : DAG->SUnits) {
+ if (!SU.isInstr() || !SU.getInstr()->isBundle())
+ continue;
+ for (SDep &Dep : SU.Succs) {
+ if (Dep.getKind() == SDep::Kind::Data && Dep.getReg())
+ if (unsigned Lat = computeLatency(*SU.getInstr(), Dep.getReg()))
+ Dep.setLatency(Lat);
+ }
+ }
+ }
+};
+
struct FillMFMAShadowMutation : ScheduleDAGMutation {
const SIInstrInfo *TII;
@@ -881,6 +920,7 @@ struct FillMFMAShadowMutation : ScheduleDAGMutation {
void GCNSubtarget::getPostRAMutations(
std::vector<std::unique_ptr<ScheduleDAGMutation>> &Mutations) const {
+ Mutations.push_back(std::make_unique<FixBundleLatencyMutation>(&InstrInfo));
Mutations.push_back(std::make_unique<MemOpClusterMutation>(&InstrInfo));
Mutations.push_back(std::make_unique<FillMFMAShadowMutation>(&InstrInfo));
}
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