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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-02 01:22:01 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-02 01:22:01 +0000 |
| commit | c0f34c9e3665020b32c561c6555eea44d2b6a08f (patch) | |
| tree | dfeeb56ebf62d0a0c954cb70e398b2290f526583 /llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | |
| parent | e4a8deea846114030d2cc59eadb7e63bfe4f1932 (diff) | |
| download | bcm5719-llvm-c0f34c9e3665020b32c561c6555eea44d2b6a08f.tar.gz bcm5719-llvm-c0f34c9e3665020b32c561c6555eea44d2b6a08f.zip | |
AMDGPU/GlobalISel: Define instruction mapping for G_AND
Patch by Tom Stellard
llvm-svn: 326523
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 22f178aa5ee..8a145bd21ff 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -284,6 +284,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { switch (MI.getOpcode()) { default: return getInvalidInstructionMapping(); + case AMDGPU::G_AND: case AMDGPU::G_OR: if (isSALUMapping(MI)) return getDefaultMappingSOP(MI); |
