diff options
| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-01 20:59:44 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-01 20:59:44 +0000 |
| commit | 62669ede947200a38264013cdcd2f51f19d03f09 (patch) | |
| tree | 694736b0f31dca9d921dbda1d8950b92b9e88440 /llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | |
| parent | 0529a8e2de9bbf2537bd636279d557a457b5fa65 (diff) | |
| download | bcm5719-llvm-62669ede947200a38264013cdcd2f51f19d03f09.tar.gz bcm5719-llvm-62669ede947200a38264013cdcd2f51f19d03f09.zip | |
AMDGPU/GlobalISel: Define instruction mapping for G_BITCAST
Patch by Tom Stellard
llvm-svn: 326482
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index 83dc059f951..fc4fa52e659 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -244,6 +244,12 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { OpdsMapping[0] = AMDGPU::getValueMapping(AMDGPU::SGPRRegBankID, Size); break; } + case AMDGPU::G_BITCAST: { + unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); + unsigned BankID = getRegBankID(MI.getOperand(1).getReg(), MRI, *TRI); + OpdsMapping[0] = OpdsMapping[1] = AMDGPU::getValueMapping(BankID, Size); + break; + } case AMDGPU::G_GEP: { for (unsigned i = 0, e = MI.getNumOperands(); i != e; ++i) { if (!MI.getOperand(i).isReg()) |
