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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-02 02:17:01 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2018-03-02 02:17:01 +0000 |
| commit | 327d5fb2e5f434b36f7c8bbff45169662b4ff683 (patch) | |
| tree | d07f55b9e72b96a2328aec89ff0b3abd1c1c97d4 /llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | |
| parent | 1cc47eadf1cd1e9e54df77aec4ba7f48a1c50d8d (diff) | |
| download | bcm5719-llvm-327d5fb2e5f434b36f7c8bbff45169662b4ff683.tar.gz bcm5719-llvm-327d5fb2e5f434b36f7c8bbff45169662b4ff683.zip | |
AMDGPU/GlobalISel: Define instruction mapping for G_FMUL
llvm-svn: 326532
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp index a4e3c6ab513..7bae7ca9647 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp @@ -293,6 +293,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const { // Fall-through case AMDGPU::G_FADD: + case AMDGPU::G_FMUL: return getDefaultMappingVOP(MI); case AMDGPU::G_IMPLICIT_DEF: { unsigned Size = MRI.getType(MI.getOperand(0).getReg()).getSizeInBits(); |
