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authorMatthew Simpson <mssimpso@codeaurora.org>2016-12-12 21:11:04 +0000
committerMatthew Simpson <mssimpso@codeaurora.org>2016-12-12 21:11:04 +0000
commit92ce0230b54de190e3b5f3dfedb0ed043b59a612 (patch)
tree03c32cabb42a1243870e29a5cd36327e04b1c0d7 /llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp
parent035af9b346556edbb116dae63836f8b69c99c57c (diff)
downloadbcm5719-llvm-92ce0230b54de190e3b5f3dfedb0ed043b59a612.tar.gz
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[SLP] Fix sign-extends for type-shrinking
This patch ensures the correct minimum bit width during type-shrinking. Previously when type-shrinking, we always sign-extended values back to their original width. However, if we are going to sign-extend, and the sign bit is unknown, we have to increase the minimum bit width by one bit so the sign-extend will fill the upper bits correctly. If the sign bit is known to be zero, we can perform a zero-extend instead. This should fix PR31243. Reference: https://llvm.org/bugs/show_bug.cgi?id=31243 Differential Revision: https://reviews.llvm.org/D27466 llvm-svn: 289470
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUMachineFunction.cpp')
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