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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-22 19:02:10 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-22 19:02:10 +0000 |
| commit | 6614f852b6527e74556b57a095d515784d3c4a0b (patch) | |
| tree | 86b45bfec4e8ee55613e2ce8c3f117145d65e9e8 /llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | |
| parent | 3c535a60ddd83d15602e45567f3796d471ab998b (diff) | |
| download | bcm5719-llvm-6614f852b6527e74556b57a095d515784d3c4a0b.tar.gz bcm5719-llvm-6614f852b6527e74556b57a095d515784d3c4a0b.zip | |
GlobalISel: Support narrowing zextload/sextload
llvm-svn: 351856
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 3d7a32af6e7..7944f4ee2e6 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -229,6 +229,24 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, }); + auto &ExtLoads = getActionDefinitionsBuilder({G_SEXTLOAD, G_ZEXTLOAD}) + .legalForTypesWithMemSize({ + {S32, GlobalPtr, 8}, + {S32, GlobalPtr, 16}, + {S32, LocalPtr, 8}, + {S32, LocalPtr, 16}, + {S32, PrivatePtr, 8}, + {S32, PrivatePtr, 16}}); + if (ST.hasFlatAddressSpace()) { + ExtLoads.legalForTypesWithMemSize({{S32, FlatPtr, 8}, + {S32, FlatPtr, 16}}); + } + + ExtLoads.clampScalar(0, S32, S32) + .widenScalarToNextPow2(0) + .unsupportedIfMemSizeNotPow2() + .lower(); + auto &Atomics = getActionDefinitionsBuilder( {G_ATOMICRMW_XCHG, G_ATOMICRMW_ADD, G_ATOMICRMW_SUB, G_ATOMICRMW_AND, G_ATOMICRMW_OR, G_ATOMICRMW_XOR, |
