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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-14 22:41:09 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-02-14 22:41:09 +0000 |
| commit | 530d05e94ac097a15722229138eea8addefc37f5 (patch) | |
| tree | 6da790889741718432e9f13d9842cce1cb117457 /llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | |
| parent | 294483f1c04823e5d9efc2f6bc37bd5b9e4b5843 (diff) | |
| download | bcm5719-llvm-530d05e94ac097a15722229138eea8addefc37f5.tar.gz bcm5719-llvm-530d05e94ac097a15722229138eea8addefc37f5.zip | |
GlobalISel: Add alignment to LegalityQuery MMOs
This allows targets to specify the minimum alignment required for the
load/store.
llvm-svn: 354071
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 19 |
1 files changed, 10 insertions, 9 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index c68190baf6f..4487bffacdc 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -397,17 +397,18 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, .clampScalar(0, S32, S64); + // FIXME: Handle alignment requirements. auto &ExtLoads = getActionDefinitionsBuilder({G_SEXTLOAD, G_ZEXTLOAD}) - .legalForTypesWithMemSize({ - {S32, GlobalPtr, 8}, - {S32, GlobalPtr, 16}, - {S32, LocalPtr, 8}, - {S32, LocalPtr, 16}, - {S32, PrivatePtr, 8}, - {S32, PrivatePtr, 16}}); + .legalForTypesWithMemDesc({ + {S32, GlobalPtr, 8, 8}, + {S32, GlobalPtr, 16, 8}, + {S32, LocalPtr, 8, 8}, + {S32, LocalPtr, 16, 8}, + {S32, PrivatePtr, 8, 8}, + {S32, PrivatePtr, 16, 8}}); if (ST.hasFlatAddressSpace()) { - ExtLoads.legalForTypesWithMemSize({{S32, FlatPtr, 8}, - {S32, FlatPtr, 16}}); + ExtLoads.legalForTypesWithMemDesc({{S32, FlatPtr, 8, 8}, + {S32, FlatPtr, 16, 8}}); } ExtLoads.clampScalar(0, S32, S32) |
