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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-03 17:50:29 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-03 17:50:29 +0000 |
| commit | 3d23e58dbedf85be84e06c07d5b7c7cc2555b689 (patch) | |
| tree | b65d303efc75064968129ecf24659e0acd0440c5 /llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | |
| parent | 691e44c146f3dd70b4ab6c744ac54a407b792b18 (diff) | |
| download | bcm5719-llvm-3d23e58dbedf85be84e06c07d5b7c7cc2555b689.tar.gz bcm5719-llvm-3d23e58dbedf85be84e06c07d5b7c7cc2555b689.zip | |
AMDGPU/GlobalISel: Fix mutationIsSane assert v8s8 and
This would try to do FewerElements to v9s8
llvm-svn: 373635
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 5 |
1 files changed, 3 insertions, 2 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 8cf5a54177d..cf4275c23e8 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -53,7 +53,8 @@ static LegalityPredicate isSmallOddVector(unsigned TypeIdx) { const LLT Ty = Query.Types[TypeIdx]; return Ty.isVector() && Ty.getNumElements() % 2 != 0 && - Ty.getElementType().getSizeInBits() < 32; + Ty.getElementType().getSizeInBits() < 32 && + Ty.getSizeInBits() % 32 != 0; }; } @@ -268,7 +269,7 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST_, .legalFor({S32, S1, S64, V2S32, S16, V2S16, V4S16}) .clampScalar(0, S32, S64) .moreElementsIf(isSmallOddVector(0), oneMoreElement(0)) - .fewerElementsIf(vectorWiderThan(0, 32), fewerEltsToSize64Vector(0)) + .fewerElementsIf(vectorWiderThan(0, 64), fewerEltsToSize64Vector(0)) .widenScalarToNextPow2(0) .scalarize(0); |
