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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-30 02:35:38 +0000 |
|---|---|---|
| committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-01-30 02:35:38 +0000 |
| commit | 045bc9a4a6089d97063e373c350ff05a8641c716 (patch) | |
| tree | 7faa7482ced36905002bbfa73f1eea096e315281 /llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | |
| parent | 018ab5fa6f023bd80b274f61f75288fee73acf80 (diff) | |
| download | bcm5719-llvm-045bc9a4a6089d97063e373c350ff05a8641c716.tar.gz bcm5719-llvm-045bc9a4a6089d97063e373c350ff05a8641c716.zip | |
GlobalISel: Support narrowScalar for uneven loads
llvm-svn: 352594
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp index 43c86aba3ad..434fcc532ba 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPULegalizerInfo.cpp @@ -237,6 +237,14 @@ AMDGPULegalizerInfo::AMDGPULegalizerInfo(const GCNSubtarget &ST, [](const LegalityQuery &Query) { return std::make_pair(0, LLT::scalar(32)); }) + .fewerElementsIf([=, &ST](const LegalityQuery &Query) { + unsigned MemSize = Query.MMODescrs[0].SizeInBits; + return Query.Types[0].isVector() && (MemSize == 96) && + ST.getGeneration() < AMDGPUSubtarget::SEA_ISLANDS; + }, + [=](const LegalityQuery &Query) { + return std::make_pair(0, V2S32); + }) .legalIf([=, &ST](const LegalityQuery &Query) { const LLT &Ty0 = Query.Types[0]; |
