diff options
author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-01 02:07:25 +0000 |
---|---|---|
committer | Matt Arsenault <Matthew.Arsenault@amd.com> | 2019-10-01 02:07:25 +0000 |
commit | 59b91aa93ec6f54670687af01b57a267fe02f400 (patch) | |
tree | 83a8ac8809141f2f062f2ece926307fdf03c6826 /llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | |
parent | 5823a28270e03826fc298fb80396e7c2fb37c2d7 (diff) | |
download | bcm5719-llvm-59b91aa93ec6f54670687af01b57a267fe02f400.tar.gz bcm5719-llvm-59b91aa93ec6f54670687af01b57a267fe02f400.zip |
AMDGPU/GlobalISel: Add support for init.exec intrinsics
TThe existing wave32 behavior seems broken and incomplete, but this
reproduces it.
llvm-svn: 373296
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 9 |
1 files changed, 9 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp index d808cc0ea33..4b186c2c8ab 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp @@ -2094,3 +2094,12 @@ AMDGPUInstructionSelector::selectDS1Addr1Offset(MachineOperand &Root) const { [=](MachineInstrBuilder &MIB) { MIB.addImm(0); } }}; } + +void AMDGPUInstructionSelector::renderTruncImm32(MachineInstrBuilder &MIB, + const MachineInstr &MI) const { + const MachineRegisterInfo &MRI = MI.getParent()->getParent()->getRegInfo(); + assert(MI.getOpcode() == TargetOpcode::G_CONSTANT && "Expected G_CONSTANT"); + Optional<int64_t> CstVal = getConstantVRegVal(MI.getOperand(0).getReg(), MRI); + assert(CstVal && "Expected constant value"); + MIB.addImm(CstVal.getValue()); +} |