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| author | Matt Arsenault <Matthew.Arsenault@amd.com> | 2020-01-03 10:02:08 -0500 |
|---|---|---|
| committer | Matt Arsenault <arsenm2@gmail.com> | 2020-01-03 10:30:30 -0500 |
| commit | 53fc4840673539a560c7bdc6315416b1e7adcf5a (patch) | |
| tree | 769866b1700e96d2f1a439065e00d0e185b64319 /llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | |
| parent | 0727e2b90c7b11d5c6be55919c443628d8e2bc6e (diff) | |
| download | bcm5719-llvm-53fc4840673539a560c7bdc6315416b1e7adcf5a.tar.gz bcm5719-llvm-53fc4840673539a560c7bdc6315416b1e7adcf5a.zip | |
AMDGPU/GlobalISel: Fix off by one in operand index
This should be looking at the RHS of the add for a constant.
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp')
| -rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp index d6b0ec6facb..40f14fa6a51 100644 --- a/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp @@ -822,12 +822,12 @@ getBaseWithConstantOffset(MachineRegisterInfo &MRI, Register Reg) { int64_t Offset; if (Def->getOpcode() == AMDGPU::G_ADD) { // TODO: Handle G_OR used for add case - if (mi_match(Def->getOperand(1).getReg(), MRI, m_ICst(Offset))) - return std::make_tuple(Def->getOperand(0).getReg(), Offset, Def); + if (mi_match(Def->getOperand(2).getReg(), MRI, m_ICst(Offset))) + return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); // FIXME: matcher should ignore copies - if (mi_match(Def->getOperand(1).getReg(), MRI, m_Copy(m_ICst(Offset)))) - return std::make_tuple(Def->getOperand(0).getReg(), Offset, Def); + if (mi_match(Def->getOperand(2).getReg(), MRI, m_Copy(m_ICst(Offset)))) + return std::make_tuple(Def->getOperand(1).getReg(), Offset, Def); } return std::make_tuple(Reg, 0, Def); |
