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| author | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-10-25 12:40:16 -0700 |
|---|---|---|
| committer | Stanislav Mekhanoshin <Stanislav.Mekhanoshin@amd.com> | 2019-10-25 15:08:30 -0700 |
| commit | 4c0251da149c99f49550d6c938e6e7f45075194d (patch) | |
| tree | 891140199f07abefb60d78aed89bfde89f5945d9 /llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp | |
| parent | 27887bc1e7a19bc568db775903d8febdeab2f617 (diff) | |
| download | bcm5719-llvm-4c0251da149c99f49550d6c938e6e7f45075194d.tar.gz bcm5719-llvm-4c0251da149c99f49550d6c938e6e7f45075194d.zip | |
[AMDGPU] Enable SGPR copy folding
That used to fail in the last testcase function because after
%0:sreg_64.sub0 was folded into %3:sreg_32_xm0_xexec COPY, it
was further folded into S_STORE_DWORD_IMM. Its legal effective
subreg class is SReg_32 while instruction expects more restricted
SReg_32_XM0_EXEC. However, SIInstrInfo::isLegalRegOperand()
passed the legality check and it was caught in the verifier.
Borrowed code from the verifier to check for RC legality.
Differential Revision: https://reviews.llvm.org/D69445
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstructionSelector.cpp')
0 files changed, 0 insertions, 0 deletions
