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author | Tom Stellard <thomas.stellard@amd.com> | 2012-07-16 14:17:08 +0000 |
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committer | Tom Stellard <thomas.stellard@amd.com> | 2012-07-16 14:17:08 +0000 |
commit | bcce80fa95e82ba9f7736525b81dbac577b5557e (patch) | |
tree | 34524b42c035f7838edc442c3b6da5a4ea88ca45 /llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | |
parent | 4273bb05d17ffdb18164b89a52f9fb1196acb51f (diff) | |
download | bcm5719-llvm-bcce80fa95e82ba9f7736525b81dbac577b5557e.tar.gz bcm5719-llvm-bcce80fa95e82ba9f7736525b81dbac577b5557e.zip |
AMDGPU: Add core backend files for R600/SI codegen v6
llvm-svn: 160270
Diffstat (limited to 'llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h')
-rw-r--r-- | llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h | 46 |
1 files changed, 46 insertions, 0 deletions
diff --git a/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h new file mode 100644 index 00000000000..b5d294bdc94 --- /dev/null +++ b/llvm/lib/Target/AMDGPU/AMDGPUInstrInfo.h @@ -0,0 +1,46 @@ +//===-- AMDGPUInstrInfo.h - AMDGPU Instruction Information ------*- C++ -*-===// +// +// The LLVM Compiler Infrastructure +// +// This file is distributed under the University of Illinois Open Source +// License. See LICENSE.TXT for details. +// +//===----------------------------------------------------------------------===// +// +// This file contains the definition of a TargetInstrInfo class that is common +// to all AMD GPUs. +// +//===----------------------------------------------------------------------===// + +#ifndef AMDGPUINSTRUCTIONINFO_H_ +#define AMDGPUINSTRUCTIONINFO_H_ + +#include "AMDGPURegisterInfo.h" +#include "AMDILInstrInfo.h" + +#include <map> + +namespace llvm { + +class AMDGPUTargetMachine; +class MachineFunction; +class MachineInstr; +class MachineInstrBuilder; + +class AMDGPUInstrInfo : public AMDILInstrInfo { + +public: + explicit AMDGPUInstrInfo(AMDGPUTargetMachine &tm); + + virtual const AMDGPURegisterInfo &getRegisterInfo() const = 0; + + /// convertToISA - Convert the AMDIL MachineInstr to a supported ISA + /// MachineInstr + virtual void convertToISA(MachineInstr & MI, MachineFunction &MF, + DebugLoc DL) const; + +}; + +} // End llvm namespace + +#endif // AMDGPUINSTRINFO_H_ |