AMDGPU/NFC: Minor clean ups in PAL metadata

  - Move PAL metadata definitions to AMDGPUMetadata
  - Make naming consistent with HSA metadata

Differential Revision: https://reviews.llvm.org/D38745

llvm-svn: 315523

1 files changed, 42 insertions, 39 deletions

diff --git a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
index a5c3745fcdf..1cd570d3c0e 100644
--- a/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
+++ b/llvm/lib/Target/AMDGPU/AMDGPUAsmPrinter.cpp
@@ -36,11 +36,13 @@
 #include "llvm/MC/MCContext.h"
 #include "llvm/MC/MCSectionELF.h"
 #include "llvm/MC/MCStreamer.h"
+#include "llvm/Support/AMDGPUMetadata.h"
 #include "llvm/Support/MathExtras.h"
 #include "llvm/Support/TargetRegistry.h"
 #include "llvm/Target/TargetLoweringObjectFile.h"
 
 using namespace llvm;
+using namespace llvm::AMDGPU;
 
 // TODO: This should get the default rounding mode from the kernel. We just set
 // the default here, but this could change if the OpenCL rounding mode pragmas
@@ -114,7 +116,7 @@ void AMDGPUAsmPrinter::EmitStartOfAsmFile(Module &M) {
       AMDGPU::IsaInfo::getIsaVersion(getSTI()->getFeatureBits());
 
   if (TM.getTargetTriple().getOS() == Triple::AMDPAL) {
-    readPalMetadata(M);
+    readPALMetadata(M);
     // AMDPAL wants an HSA_ISA .note.
     getTargetStreamer().EmitDirectiveHSACodeObjectISA(
         ISA.Major, ISA.Minor, ISA.Stepping, "AMD", "AMDGPU");
@@ -132,12 +134,12 @@ void AMDGPUAsmPrinter::EmitEndOfAsmFile(Module &M) {
   if (TM.getTargetTriple().getOS() == Triple::AMDPAL) {
     // Copy the PAL metadata from the map where we collected it into a vector,
     // then write it as a .note.
-    std::vector<uint32_t> Data;
-    for (auto i : PalMetadata) {
-      Data.push_back(i.first);
-      Data.push_back(i.second);
+    PALMD::Metadata PALMetadataVector;
+    for (auto i : PALMetadataMap) {
+      PALMetadataVector.push_back(i.first);
+      PALMetadataVector.push_back(i.second);
     }
-    getTargetStreamer().EmitPalMetadata(Data);
+    getTargetStreamer().EmitPALMetadata(PALMetadataVector);
   }
 
   if (TM.getTargetTriple().getOS() != Triple::AMDHSA)
@@ -207,11 +209,11 @@ bool AMDGPUAsmPrinter::doFinalization(Module &M) {
 }
 
 // For the amdpal OS type, read the amdgpu.pal.metadata supplied by the
-// frontend into our PalMetadata map, ready for per-function modification.  It
+// frontend into our PALMetadataMap, ready for per-function modification.  It
 // is a NamedMD containing an MDTuple containing a number of MDNodes each of
 // which is an integer value, and each two integer values forms a key=value
-// pair that we store as PalMetadata[key]=value in the map.
-void AMDGPUAsmPrinter::readPalMetadata(Module &M) {
+// pair that we store as PALMetadataMap[key]=value in the map.
+void AMDGPUAsmPrinter::readPALMetadata(Module &M) {
   auto NamedMD = M.getNamedMetadata("amdgpu.pal.metadata");
   if (!NamedMD || !NamedMD->getNumOperands())
     return;
@@ -223,7 +225,7 @@ void AMDGPUAsmPrinter::readPalMetadata(Module &M) {
     auto Val = mdconst::dyn_extract<ConstantInt>(Tuple->getOperand(I + 1));
     if (!Key || !Val)
       continue;
-    PalMetadata[Key->getZExtValue()] = Val->getZExtValue();
+    PALMetadataMap[Key->getZExtValue()] = Val->getZExtValue();
   }
 }
 
@@ -270,7 +272,7 @@ bool AMDGPUAsmPrinter::runOnMachineFunction(MachineFunction &MF) {
     }
 
     if (STM.isAmdPalOS())
-      EmitPalMetadata(MF, CurrentProgramInfo);
+      EmitPALMetadata(MF, CurrentProgramInfo);
     if (!STM.isAmdHsaOS()) {
       EmitProgramInfoSI(MF, CurrentProgramInfo);
     }
@@ -964,10 +966,10 @@ void AMDGPUAsmPrinter::EmitProgramInfoSI(const MachineFunction &MF,
 
 // This is the equivalent of EmitProgramInfoSI above, but for when the OS type
 // is AMDPAL.  It stores each compute/SPI register setting and other PAL
-// metadata items into the PalMetadata map, combining with any provided by the
-// frontend as LLVM metadata. Once all functions are written, PalMetadata is
+// metadata items into the PALMetadataMap, combining with any provided by the
+// frontend as LLVM metadata. Once all functions are written, PALMetadataMap is
 // then written as a single block in the .note section.
-void AMDGPUAsmPrinter::EmitPalMetadata(const MachineFunction &MF,
+void AMDGPUAsmPrinter::EmitPALMetadata(const MachineFunction &MF,
        const SIProgramInfo &CurrentProgramInfo) {
   const SIMachineFunctionInfo *MFI = MF.getInfo<SIMachineFunctionInfo>();
   // Given the calling convention, calculate the register number for rsrc1. In
@@ -981,52 +983,53 @@ void AMDGPUAsmPrinter::EmitPalMetadata(const MachineFunction &MF,
   // Also calculate the PAL metadata key for *S_SCRATCH_SIZE. It can be used
   // with a constant offset to access any non-register shader-specific PAL
   // metadata key.
-  unsigned ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_CS_SCRATCH_SIZE;
+  unsigned ScratchSizeKey = PALMD::Key::CS_SCRATCH_SIZE;
   switch (MF.getFunction()->getCallingConv()) {
     case CallingConv::AMDGPU_PS:
-      ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_PS_SCRATCH_SIZE;
+      ScratchSizeKey = PALMD::Key::PS_SCRATCH_SIZE;
       break;
     case CallingConv::AMDGPU_VS:
-      ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_VS_SCRATCH_SIZE;
+      ScratchSizeKey = PALMD::Key::VS_SCRATCH_SIZE;
       break;
     case CallingConv::AMDGPU_GS:
-      ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_GS_SCRATCH_SIZE;
+      ScratchSizeKey = PALMD::Key::GS_SCRATCH_SIZE;
       break;
     case CallingConv::AMDGPU_ES:
-      ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_ES_SCRATCH_SIZE;
+      ScratchSizeKey = PALMD::Key::ES_SCRATCH_SIZE;
       break;
     case CallingConv::AMDGPU_HS:
-      ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_HS_SCRATCH_SIZE;
+      ScratchSizeKey = PALMD::Key::HS_SCRATCH_SIZE;
       break;
     case CallingConv::AMDGPU_LS:
-      ScratchSizeKey = AMDGPU::ElfNote::AMDGPU_PAL_METADATA_LS_SCRATCH_SIZE;
+      ScratchSizeKey = PALMD::Key::LS_SCRATCH_SIZE;
       break;
   }
-  unsigned NumUsedVgprsKey = ScratchSizeKey
-      + AMDGPU::ElfNote::AMDGPU_PAL_METADATA_VS_NUM_USED_VGPRS
-      - AMDGPU::ElfNote::AMDGPU_PAL_METADATA_VS_SCRATCH_SIZE;
-  unsigned NumUsedSgprsKey = ScratchSizeKey
-      + AMDGPU::ElfNote::AMDGPU_PAL_METADATA_VS_NUM_USED_SGPRS
-      - AMDGPU::ElfNote::AMDGPU_PAL_METADATA_VS_SCRATCH_SIZE;
-  PalMetadata[NumUsedVgprsKey] = CurrentProgramInfo.NumVGPRsForWavesPerEU;
-  PalMetadata[NumUsedSgprsKey] = CurrentProgramInfo.NumSGPRsForWavesPerEU;
+  unsigned NumUsedVgprsKey = ScratchSizeKey +
+      PALMD::Key::VS_NUM_USED_VGPRS - PALMD::Key::VS_SCRATCH_SIZE;
+  unsigned NumUsedSgprsKey = ScratchSizeKey +
+      PALMD::Key::VS_NUM_USED_SGPRS - PALMD::Key::VS_SCRATCH_SIZE;
+  PALMetadataMap[NumUsedVgprsKey] = CurrentProgramInfo.NumVGPRsForWavesPerEU;
+  PALMetadataMap[NumUsedSgprsKey] = CurrentProgramInfo.NumSGPRsForWavesPerEU;
   if (AMDGPU::isCompute(MF.getFunction()->getCallingConv())) {
-    PalMetadata[Rsrc1Reg] |= CurrentProgramInfo.ComputePGMRSrc1;
-    PalMetadata[Rsrc2Reg] |= CurrentProgramInfo.ComputePGMRSrc2;
+    PALMetadataMap[Rsrc1Reg] |= CurrentProgramInfo.ComputePGMRSrc1;
+    PALMetadataMap[Rsrc2Reg] |= CurrentProgramInfo.ComputePGMRSrc2;
     // ScratchSize is in bytes, 16 aligned.
-    PalMetadata[ScratchSizeKey] |= alignTo(CurrentProgramInfo.ScratchSize, 16);
+    PALMetadataMap[ScratchSizeKey] |=
+        alignTo(CurrentProgramInfo.ScratchSize, 16);
   } else {
-    PalMetadata[Rsrc1Reg] |= S_00B028_VGPRS(CurrentProgramInfo.VGPRBlocks)
-                             | S_00B028_SGPRS(CurrentProgramInfo.SGPRBlocks);
+    PALMetadataMap[Rsrc1Reg] |= S_00B028_VGPRS(CurrentProgramInfo.VGPRBlocks) |
+        S_00B028_SGPRS(CurrentProgramInfo.SGPRBlocks);
     if (CurrentProgramInfo.ScratchBlocks > 0)
-      PalMetadata[Rsrc2Reg] |= S_00B84C_SCRATCH_EN(1);
+      PALMetadataMap[Rsrc2Reg] |= S_00B84C_SCRATCH_EN(1);
     // ScratchSize is in bytes, 16 aligned.
-    PalMetadata[ScratchSizeKey] |= alignTo(CurrentProgramInfo.ScratchSize, 16);
+    PALMetadataMap[ScratchSizeKey] |=
+        alignTo(CurrentProgramInfo.ScratchSize, 16);
   }
   if (MF.getFunction()->getCallingConv() == CallingConv::AMDGPU_PS) {
-    PalMetadata[Rsrc2Reg] |= S_00B02C_EXTRA_LDS_SIZE(CurrentProgramInfo.LDSBlocks);
-    PalMetadata[R_0286CC_SPI_PS_INPUT_ENA / 4] |= MFI->getPSInputEnable();
-    PalMetadata[R_0286D0_SPI_PS_INPUT_ADDR / 4] |= MFI->getPSInputAddr();
+    PALMetadataMap[Rsrc2Reg] |=
+        S_00B02C_EXTRA_LDS_SIZE(CurrentProgramInfo.LDSBlocks);
+    PALMetadataMap[R_0286CC_SPI_PS_INPUT_ENA / 4] |= MFI->getPSInputEnable();
+    PALMetadataMap[R_0286D0_SPI_PS_INPUT_ADDR / 4] |= MFI->getPSInputAddr();
   }
 }