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authorDavid Majnemer <david.majnemer@gmail.com>2013-04-11 20:13:52 +0000
committerDavid Majnemer <david.majnemer@gmail.com>2013-04-11 20:13:52 +0000
commit938493999e943868354a680db1d76f6b834e40f8 (patch)
treea13015a109f90489b5c4d6be19ebb380d4309728 /llvm/lib/Target/AArch64/Utils
parentb81cd63c4b7d9a352eab7ccf8d95962999d320a9 (diff)
downloadbcm5719-llvm-938493999e943868354a680db1d76f6b834e40f8.tar.gz
bcm5719-llvm-938493999e943868354a680db1d76f6b834e40f8.zip
Fix undefined behavior in AArch64
A64Imms::isLogicalImmBits and A64Imms::isLogicalImm will attempt to execute shifts that perform undefined behavior. Instead of attempting to perform the 64-bit rotation, treat it as a no-op. llvm-svn: 179317
Diffstat (limited to 'llvm/lib/Target/AArch64/Utils')
-rw-r--r--llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp18
1 files changed, 11 insertions, 7 deletions
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
index 1678559aa08..bedccb5438f 100644
--- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
+++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp
@@ -981,8 +981,11 @@ bool A64Imms::isLogicalImm(unsigned RegWidth, uint64_t Imm, uint32_t &Bits) {
Rotation = RepeatWidth - Rotation;
}
- uint64_t ReplicatedOnes = (ReplicatedMask >> Rotation)
- | ((ReplicatedMask << (RepeatWidth - Rotation)) & RepeatMask);
+ uint64_t ReplicatedOnes = ReplicatedMask;
+ if (Rotation != 0 && Rotation != 64)
+ ReplicatedOnes = (ReplicatedMask >> Rotation)
+ | ((ReplicatedMask << (RepeatWidth - Rotation)) & RepeatMask);
+
// Of course, they may not actually be ones, so we have to check that:
if (!isMask_64(ReplicatedOnes))
continue;
@@ -1051,13 +1054,14 @@ bool A64Imms::isLogicalImmBits(unsigned RegWidth, uint32_t Bits,
int Rotation = (ImmR & (Width - 1));
uint64_t Mask = (1ULL << Num1s) - 1;
uint64_t WidthMask = Width == 64 ? -1 : (1ULL << Width) - 1;
- Mask = (Mask >> Rotation)
- | ((Mask << (Width - Rotation)) & WidthMask);
+ if (Rotation != 0 && Rotation != 64)
+ Mask = (Mask >> Rotation)
+ | ((Mask << (Width - Rotation)) & WidthMask);
- Imm = 0;
- for (unsigned i = 0; i < RegWidth / Width; ++i) {
- Imm |= Mask;
+ Imm = Mask;
+ for (unsigned i = 1; i < RegWidth / Width; ++i) {
Mask <<= Width;
+ Imm |= Mask;
}
return true;
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