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| author | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-07-06 08:03:12 +0000 |
|---|---|---|
| committer | Sjoerd Meijer <sjoerd.meijer@arm.com> | 2018-07-06 08:03:12 +0000 |
| commit | 2a57b357a3a0de2202a3fb0272d2648a205bcdfa (patch) | |
| tree | 7a78591803955adc522b572bfac72a8ce8e58e15 /llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | |
| parent | be4c2933a2c370d292122fc2187d75436aeaea83 (diff) | |
| download | bcm5719-llvm-2a57b357a3a0de2202a3fb0272d2648a205bcdfa.tar.gz bcm5719-llvm-2a57b357a3a0de2202a3fb0272d2648a205bcdfa.zip | |
[AArch64][ARM] Armv8.4-A: Trace synchronization barrier instruction
This adds the Armv8.4-A Trace synchronization barrier (TSB) instruction.
Differential Revision: https://reviews.llvm.org/D48918
llvm-svn: 336418
Diffstat (limited to 'llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp index 5f6eaa0613b..23cc21ce2e7 100644 --- a/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp +++ b/llvm/lib/Target/AArch64/Utils/AArch64BaseInfo.cpp @@ -53,6 +53,14 @@ namespace llvm { #include "AArch64GenSystemOperands.inc" } } + +namespace llvm { + namespace AArch64TSB { +#define GET_TSB_IMPL +#include "AArch64GenSystemOperands.inc" + } +} + namespace llvm { namespace AArch64PRFM { #define GET_PRFM_IMPL |
