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author | Hao Liu <Hao.Liu@arm.com> | 2013-11-28 01:07:45 +0000 |
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committer | Hao Liu <Hao.Liu@arm.com> | 2013-11-28 01:07:45 +0000 |
commit | f9f468abeeb8b9c92288964ff3aaa4ba15ffdf1a (patch) | |
tree | 068c1f39baed73aa3a87bf32b796bf31123f24df /llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp | |
parent | 0d409e2dfec8df7e92d492fc8d9935ce6c09996c (diff) | |
download | bcm5719-llvm-f9f468abeeb8b9c92288964ff3aaa4ba15ffdf1a.tar.gz bcm5719-llvm-f9f468abeeb8b9c92288964ff3aaa4ba15ffdf1a.zip |
AArch64: Fix a bug about disassembling post-index load single element to 4 vectors
llvm-svn: 195903
Diffstat (limited to 'llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp | 8 |
1 files changed, 4 insertions, 4 deletions
diff --git a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp index 65f477642d7..1f70a3d32cb 100644 --- a/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp +++ b/llvm/lib/Target/AArch64/Disassembler/AArch64Disassembler.cpp @@ -1342,13 +1342,13 @@ static DecodeStatus DecodeVLDSTLanePostInstruction(MCInst &Inst, unsigned Insn, case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: { switch (Opc) { case AArch64::LD4LN_WB_B_fixed: case AArch64::LD4LN_WB_B_register: - TransferBytes = 3; break; + TransferBytes = 4; break; case AArch64::LD4LN_WB_H_fixed: case AArch64::LD4LN_WB_H_register: - TransferBytes = 6; break; + TransferBytes = 8; break; case AArch64::LD4LN_WB_S_fixed: case AArch64::LD4LN_WB_S_register: - TransferBytes = 12; break; + TransferBytes = 16; break; case AArch64::LD4LN_WB_D_fixed: case AArch64::LD4LN_WB_D_register: - TransferBytes = 24; break; + TransferBytes = 32; break; } IsLoad = true; NumVecs = 4; |