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| author | Adam Nemet <anemet@apple.com> | 2016-03-18 00:27:38 +0000 |
|---|---|---|
| committer | Adam Nemet <anemet@apple.com> | 2016-03-18 00:27:38 +0000 |
| commit | 6d8beeca5302984e845d9c6d7bf0a9e4a5ca98f9 (patch) | |
| tree | b08c60faf3269ff2160ae9f7e5fd185f56d4d643 /llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h | |
| parent | 53e758fc55687de06d905d34e7cb58a9560093d2 (diff) | |
| download | bcm5719-llvm-6d8beeca5302984e845d9c6d7bf0a9e4a5ca98f9.tar.gz bcm5719-llvm-6d8beeca5302984e845d9c6d7bf0a9e4a5ca98f9.zip | |
[LoopDataPrefetch/Aarch64] Allow selective prefetching of large-strided accesses
Summary:
And use this TTI for Cyclone. As it was explained in the original RFC
(http://thread.gmane.org/gmane.comp.compilers.llvm.devel/92758), the HW
prefetcher work up to 2KB strides.
I am also adding tests for this and the previous change (D17943):
* Cyclone prefetching accesses with a large stride
* Cyclone not prefetching accesses with a small stride
* Generic Aarch64 subtarget not prefetching either
Reviewers: hfinkel
Subscribers: aemerson, rengolin, llvm-commits, mzolotukhin
Differential Revision: http://reviews.llvm.org/D17945
llvm-svn: 263771
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h | 2 |
1 files changed, 2 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h index ad711f511e5..a54db00e7d3 100644 --- a/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h +++ b/llvm/lib/Target/AArch64/AArch64TargetTransformInfo.h @@ -131,6 +131,8 @@ public: unsigned getCacheLineSize(); unsigned getPrefetchDistance(); + + unsigned getMinPrefetchStride(); /// @} }; |

