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authorEvandro Menezes <e.menezes@samsung.com>2018-01-30 15:40:16 +0000
committerEvandro Menezes <e.menezes@samsung.com>2018-01-30 15:40:16 +0000
commit9f9daa1f14f4b087edce2ceb4e36e2dec38680e1 (patch)
tree6ff026a90659cee5d8c983b91b82931499870a3f /llvm/lib/Target/AArch64/AArch64Subtarget.cpp
parent4256fd0b4b85598f9b47308d15715a5b4f1e1813 (diff)
downloadbcm5719-llvm-9f9daa1f14f4b087edce2ceb4e36e2dec38680e1.tar.gz
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[AArch64] Add pipeline model for Exynos M3
Add the scheduling and cost model for Exynos M3. Differential revision: https://reviews.llvm.org/D42387 llvm-svn: 323773
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64Subtarget.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64Subtarget.cpp6
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
index eb9bb1498d6..f7a8b82c965 100644
--- a/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
+++ b/llvm/lib/Target/AArch64/AArch64Subtarget.cpp
@@ -82,6 +82,12 @@ void AArch64Subtarget::initializeProperties() {
PrefFunctionAlignment = 4;
PrefLoopAlignment = 3;
break;
+ case ExynosM3:
+ MaxInterleaveFactor = 4;
+ MaxJumpTableSize = 20;
+ PrefFunctionAlignment = 5;
+ PrefLoopAlignment = 4;
+ break;
case Falkor:
MaxInterleaveFactor = 4;
// FIXME: remove this to enable 64-bit SLP if performance looks good.
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