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authorTim Northover <tnorthover@apple.com>2019-09-12 10:22:23 +0000
committerTim Northover <tnorthover@apple.com>2019-09-12 10:22:23 +0000
commitf1c28929125400a1680868f7c6eea720de256779 (patch)
tree0ef7b4fac0adf3a403b55134b9df4a89616efaaa /llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
parent98534843fb4c14ebe8022143cdcfc2a4ea8d2d02 (diff)
downloadbcm5719-llvm-f1c28929125400a1680868f7c6eea720de256779.tar.gz
bcm5719-llvm-f1c28929125400a1680868f7c6eea720de256779.zip
AArch64: support arm64_32, an ILP32 slice for watchOS.
This is the main CodeGen patch to support the arm64_32 watchOS ABI in LLVM. FastISel is mostly disabled for now since it would generate incorrect code for ILP32. llvm-svn: 371722
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp2
1 files changed, 1 insertions, 1 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp b/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
index 60dbace03ca..ba61ed726e8 100644
--- a/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64SelectionDAGInfo.cpp
@@ -32,7 +32,7 @@ SDValue AArch64SelectionDAGInfo::EmitTargetCodeForMemset(
const AArch64TargetLowering &TLI = *STI.getTargetLowering();
EVT IntPtr = TLI.getPointerTy(DAG.getDataLayout());
- Type *IntPtrTy = DAG.getDataLayout().getIntPtrType(*DAG.getContext());
+ Type *IntPtrTy = Type::getInt8PtrTy(*DAG.getContext());
TargetLowering::ArgListTy Args;
TargetLowering::ArgListEntry Entry;
Entry.Node = Dst;
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