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authorKevin Qin <Kevin.Qin@arm.com>2014-01-24 07:53:04 +0000
committerKevin Qin <Kevin.Qin@arm.com>2014-01-24 07:53:04 +0000
commit21cd2152d3cf3eb63c95e496b3fb944b5caa17ac (patch)
tree0669eee9a501e7fc83ab52bf3c55b1eb2ab7e63c /llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
parentdc3bcc19cff5be9ac4b4211f1be49cd0b2ea06ee (diff)
downloadbcm5719-llvm-21cd2152d3cf3eb63c95e496b3fb944b5caa17ac.tar.gz
bcm5719-llvm-21cd2152d3cf3eb63c95e496b3fb944b5caa17ac.zip
[AArch64 NEON] Fix a bug in implementing register copy bwtween FPR16.
llvm-svn: 199978
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64InstrInfo.cpp')
-rw-r--r--llvm/lib/Target/AArch64/AArch64InstrInfo.cpp4
1 files changed, 2 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
index 34312e22844..9bf9d1918c0 100644
--- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
+++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp
@@ -135,9 +135,9 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB,
} else if (AArch64::FPR16RegClass.contains(DestReg, SrcReg)) {
// The copy of two FPR16 registers is implemented by the copy of two FPR32
const TargetRegisterInfo *TRI = &getRegisterInfo();
- unsigned Dst = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_16,
+ unsigned Dst = TRI->getMatchingSuperReg(DestReg, AArch64::sub_16,
&AArch64::FPR32RegClass);
- unsigned Src = TRI->getMatchingSuperReg(DestReg, AArch64::sub_16,
+ unsigned Src = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_16,
&AArch64::FPR32RegClass);
BuildMI(MBB, I, DL, get(AArch64::FMOVss), Dst)
.addReg(Src);
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