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| author | Aaron Ballman <aaron@aaronballman.com> | 2014-08-09 19:53:34 +0000 |
|---|---|---|
| committer | Aaron Ballman <aaron@aaronballman.com> | 2014-08-09 19:53:34 +0000 |
| commit | 18ac683fe5cf85861187544b1e24b847708da8d1 (patch) | |
| tree | ebc3a18a390a7b86e8716ac50a80dfe95eee229c /llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | |
| parent | 17a80e49e7c0d2591ddaa35089e585c845b24c76 (diff) | |
| download | bcm5719-llvm-18ac683fe5cf85861187544b1e24b847708da8d1.tar.gz bcm5719-llvm-18ac683fe5cf85861187544b1e24b847708da8d1.zip | |
Resolving some type truncation warnings in MSVC (enum to bool in this case). No functional changes intended.
llvm-svn: 215293
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64InstrInfo.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 6 |
1 files changed, 3 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index 80aa9b5413a..df883d35fa1 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -2554,7 +2554,7 @@ void AArch64InstrInfo::genAlternativeCodeSequence( if (AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) { MachineInstrBuilder MIB1 = BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc)) - .addOperand(MachineOperand::CreateReg(NewVR, RegState::Define)) + .addOperand(MachineOperand::CreateReg(NewVR, true)) .addReg(ZeroReg) .addImm(Encoding); InsInstrs.push_back(MIB1); @@ -2586,7 +2586,7 @@ void AArch64InstrInfo::genAlternativeCodeSequence( // SUB NewVR, 0, C MachineInstrBuilder MIB1 = BuildMI(MF, Root.getDebugLoc(), TII->get(SubOpc)) - .addOperand(MachineOperand::CreateReg(NewVR, RegState::Define)) + .addOperand(MachineOperand::CreateReg(NewVR, true)) .addReg(ZeroReg) .addOperand(Root.getOperand(2)); InsInstrs.push_back(MIB1); @@ -2635,7 +2635,7 @@ void AArch64InstrInfo::genAlternativeCodeSequence( if (AArch64_AM::processLogicalImmediate(UImm, BitSize, Encoding)) { MachineInstrBuilder MIB1 = BuildMI(MF, Root.getDebugLoc(), TII->get(OrrOpc)) - .addOperand(MachineOperand::CreateReg(NewVR, RegState::Define)) + .addOperand(MachineOperand::CreateReg(NewVR, true)) .addReg(ZeroReg) .addImm(Encoding); InsInstrs.push_back(MIB1); |
