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author | Hao Liu <Hao.Liu@arm.com> | 2014-01-17 06:23:30 +0000 |
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committer | Hao Liu <Hao.Liu@arm.com> | 2014-01-17 06:23:30 +0000 |
commit | 17457a2ee2bddb29027dd84b29b096295bab1309 (patch) | |
tree | 5f89283a8f8d4e242291feed292d9e601e1ae683 /llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | |
parent | 212d9b4a56c9ef9b4ad6f8a41cfd9087470247c1 (diff) | |
download | bcm5719-llvm-17457a2ee2bddb29027dd84b29b096295bab1309.tar.gz bcm5719-llvm-17457a2ee2bddb29027dd84b29b096295bab1309.zip |
[AArch64]Fix the problem can't select f16_to_f32 and f32_to_f16.
Also add copy support for FPR16.
Also add a missing test case file belongs to commit r197361.
llvm-svn: 199463
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64InstrInfo.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64InstrInfo.cpp | 10 |
1 files changed, 10 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp index 3cbe5ccf556..34312e22844 100644 --- a/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp +++ b/llvm/lib/Target/AArch64/AArch64InstrInfo.cpp @@ -132,6 +132,16 @@ void AArch64InstrInfo::copyPhysReg(MachineBasicBlock &MBB, .addImm(16); return; } + } else if (AArch64::FPR16RegClass.contains(DestReg, SrcReg)) { + // The copy of two FPR16 registers is implemented by the copy of two FPR32 + const TargetRegisterInfo *TRI = &getRegisterInfo(); + unsigned Dst = TRI->getMatchingSuperReg(SrcReg, AArch64::sub_16, + &AArch64::FPR32RegClass); + unsigned Src = TRI->getMatchingSuperReg(DestReg, AArch64::sub_16, + &AArch64::FPR32RegClass); + BuildMI(MBB, I, DL, get(AArch64::FMOVss), Dst) + .addReg(Src); + return; } else { CopyPhysRegTuple(MBB, I, DL, DestReg, SrcReg); return; |