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| author | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2015-09-11 17:08:17 +0000 |
|---|---|---|
| committer | Ahmed Bougacha <ahmed.bougacha@gmail.com> | 2015-09-11 17:08:17 +0000 |
| commit | 9d677131c441dd238f8d5b218b1cb9ef47cac5c2 (patch) | |
| tree | 18ddd8a1fbcf1c419e5309ed03eb266184c1d42d /llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | |
| parent | 25b5bd27eac26c75998eee7dff99b7af4b2e7884 (diff) | |
| download | bcm5719-llvm-9d677131c441dd238f8d5b218b1cb9ef47cac5c2.tar.gz bcm5719-llvm-9d677131c441dd238f8d5b218b1cb9ef47cac5c2.zip | |
[CodeGen] Rename AtomicRMWExpansionKind to AtomicExpansionKind.
This lets us generalize its usage to the other atomic instructions.
llvm-svn: 247428
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64ISelLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | 5 |
1 files changed, 2 insertions, 3 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp index a51b75809b5..9145c1e9cbf 100644 --- a/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64ISelLowering.cpp @@ -9498,11 +9498,10 @@ bool AArch64TargetLowering::shouldExpandAtomicLoadInIR(LoadInst *LI) const { } // For the real atomic operations, we have ldxr/stxr up to 128 bits, -TargetLoweringBase::AtomicRMWExpansionKind +TargetLoweringBase::AtomicExpansionKind AArch64TargetLowering::shouldExpandAtomicRMWInIR(AtomicRMWInst *AI) const { unsigned Size = AI->getType()->getPrimitiveSizeInBits(); - return Size <= 128 ? AtomicRMWExpansionKind::LLSC - : AtomicRMWExpansionKind::None; + return Size <= 128 ? AtomicExpansionKind::LLSC : AtomicExpansionKind::None; } bool AArch64TargetLowering::hasLoadLinkedStoreConditional() const { |
