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| author | John Brawn <john.brawn@arm.com> | 2020-01-22 14:04:12 +0000 |
|---|---|---|
| committer | Hans Wennborg <hans@chromium.org> | 2020-02-18 16:46:41 +0100 |
| commit | 19f4aa2d0ad68b99155582f28f0dfe2406c8fe32 (patch) | |
| tree | fe00780a4139b41385ed66fc517c51dfa227aa89 /llvm/lib/Target/AArch64/AArch64ISelLowering.cpp | |
| parent | fca6c5e5dbf283b9e96b4a6ba8d343ff5dd91328 (diff) | |
| download | bcm5719-llvm-19f4aa2d0ad68b99155582f28f0dfe2406c8fe32.tar.gz bcm5719-llvm-19f4aa2d0ad68b99155582f28f0dfe2406c8fe32.zip | |
[FPEnv][ARM] Add lowering of STRICT_FSETCC and STRICT_FSETCCS
These can be lowered to code sequences using CMPFP and CMPFPE which then get
selected to VCMP and VCMPE. The implementation isn't fully correct, as the chain
operand isn't handled correctly, but resolving that looks like it would involve
changes around FPSCR-handling instructions and how the FPSCR is modelled.
The fp-intrinsics test was already testing some of this but as the entire test
was being XFAILed it wasn't noticed. Un-XFAIL the test and instead leave the
cases where we aren't generating the right instruction sequences as FIXME.
Differential Revision: https://reviews.llvm.org/D73194
(cherry picked from commit b37d59353f699e99f139a9227a6a69964ef4b132)
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64ISelLowering.cpp')
0 files changed, 0 insertions, 0 deletions
