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| author | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-07-08 20:29:42 +0000 |
|---|---|---|
| committer | Duncan P. N. Exon Smith <dexonsmith@apple.com> | 2016-07-08 20:29:42 +0000 |
| commit | ab53fd9b500b361b9f809c7cd969ae094e6d8935 (patch) | |
| tree | de7dd3672026dff853ec30e300bf13e0c487576c /llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | |
| parent | 79c99fb7ebca48590f3535378509d226f588b014 (diff) | |
| download | bcm5719-llvm-ab53fd9b500b361b9f809c7cd969ae094e6d8935.tar.gz bcm5719-llvm-ab53fd9b500b361b9f809c7cd969ae094e6d8935.zip | |
AArch64: Avoid implicit iterator conversions, NFC
Avoid implicit conversions from MachineInstrBundleInstr to MachineInstr*
in the AArch64 backend, mainly by preferring MachineInstr& over
MachineInstr* when a pointer isn't nullable.
llvm-svn: 274924
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64FrameLowering.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64FrameLowering.cpp | 14 |
1 files changed, 7 insertions, 7 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp index 5fbec7e49ad..82111e5c725 100644 --- a/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp +++ b/llvm/lib/Target/AArch64/AArch64FrameLowering.cpp @@ -384,9 +384,9 @@ static MachineBasicBlock::iterator convertCalleeSaveRestoreToSPPrePostIncDec( // Fixup callee-save register save/restore instructions to take into account // combined SP bump by adding the local stack size to the stack offsets. -static void fixupCalleeSaveRestoreStackOffset(MachineInstr *MI, +static void fixupCalleeSaveRestoreStackOffset(MachineInstr &MI, unsigned LocalStackSize) { - unsigned Opc = MI->getOpcode(); + unsigned Opc = MI.getOpcode(); (void)Opc; assert((Opc == AArch64::STPXi || Opc == AArch64::STPDi || Opc == AArch64::STRXui || Opc == AArch64::STRDui || @@ -394,11 +394,11 @@ static void fixupCalleeSaveRestoreStackOffset(MachineInstr *MI, Opc == AArch64::LDRXui || Opc == AArch64::LDRDui) && "Unexpected callee-save save/restore opcode!"); - unsigned OffsetIdx = MI->getNumExplicitOperands() - 1; - assert(MI->getOperand(OffsetIdx - 1).getReg() == AArch64::SP && + unsigned OffsetIdx = MI.getNumExplicitOperands() - 1; + assert(MI.getOperand(OffsetIdx - 1).getReg() == AArch64::SP && "Unexpected base register in callee-save save/restore instruction!"); // Last operand is immediate offset that needs fixing. - MachineOperand &OffsetOpnd = MI->getOperand(OffsetIdx); + MachineOperand &OffsetOpnd = MI.getOperand(OffsetIdx); // All generated opcodes have scaled offsets. assert(LocalStackSize % 8 == 0); OffsetOpnd.setImm(OffsetOpnd.getImm() + LocalStackSize / 8); @@ -477,7 +477,7 @@ void AArch64FrameLowering::emitPrologue(MachineFunction &MF, MachineBasicBlock::iterator End = MBB.end(); while (MBBI != End && MBBI->getFlag(MachineInstr::FrameSetup)) { if (CombineSPBump) - fixupCalleeSaveRestoreStackOffset(MBBI, AFI->getLocalStackSize()); + fixupCalleeSaveRestoreStackOffset(*MBBI, AFI->getLocalStackSize()); ++MBBI; } if (HasFP) { @@ -724,7 +724,7 @@ void AArch64FrameLowering::emitEpilogue(MachineFunction &MF, ++LastPopI; break; } else if (CombineSPBump) - fixupCalleeSaveRestoreStackOffset(LastPopI, AFI->getLocalStackSize()); + fixupCalleeSaveRestoreStackOffset(*LastPopI, AFI->getLocalStackSize()); } // If there is a single SP update, insert it before the ret and we're done. |
