diff options
| author | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-24 09:54:41 +0000 |
|---|---|---|
| committer | Oliver Stannard <oliver.stannard@arm.com> | 2014-10-24 09:54:41 +0000 |
| commit | f7a5afc3f2ab0c1f0252aa438388fb12b495a3b3 (patch) | |
| tree | 3fb5cf4ad3f95e098d199d8b29d8dedc8ebfb82e /llvm/lib/Target/AArch64/AArch64FastISel.cpp | |
| parent | f266601ce9c242addca771a955665ff60609e2a4 (diff) | |
| download | bcm5719-llvm-f7a5afc3f2ab0c1f0252aa438388fb12b495a3b3.tar.gz bcm5719-llvm-f7a5afc3f2ab0c1f0252aa438388fb12b495a3b3.zip | |
[AArch64] Fix fast-isel of cbz of i1, i8, i16
This fixes a miscompilation in the AArch64 fast-isel which was
triggered when a branch is based on an icmp with condition eq or ne,
and type i1, i8 or i16. The cbz instruction compares the whole 32-bit
register, so values with the bottom 1, 8 or 16 bits clear would cause
the wrong branch to be taken.
llvm-svn: 220553
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64FastISel.cpp')
| -rw-r--r-- | llvm/lib/Target/AArch64/AArch64FastISel.cpp | 6 |
1 files changed, 6 insertions, 0 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index 5972d4aad78..a69185854f7 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -2181,6 +2181,12 @@ bool AArch64FastISel::emitCompareAndBranch(const BranchInst *BI) { SrcReg = fastEmitInst_extractsubreg(MVT::i32, SrcReg, SrcIsKill, AArch64::sub_32); + if ((BW < 32) && !IsBitTest) { + EVT CmpEVT = TLI.getValueType(Ty, true); + SrcReg = + emitIntExt(CmpEVT.getSimpleVT(), SrcReg, MVT::i32, /*isZExt*/ true); + } + // Emit the combined compare and branch instruction. SrcReg = constrainOperandRegClass(II, SrcReg, II.getNumDefs()); MachineInstrBuilder MIB = |
