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author | Juergen Ributzka <juergen@apple.com> | 2014-07-25 17:47:14 +0000 |
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committer | Juergen Ributzka <juergen@apple.com> | 2014-07-25 17:47:14 +0000 |
commit | 5d6c43e2942894b1183041ba5cb00d413ae484d4 (patch) | |
tree | 20b24d12ff0f8d5996deddfe4a208918fd49da96 /llvm/lib/Target/AArch64/AArch64FastISel.cpp | |
parent | 104fb54dfa7d979fb3bcedb3ddbfc0de0cae641d (diff) | |
download | bcm5719-llvm-5d6c43e2942894b1183041ba5cb00d413ae484d4.tar.gz bcm5719-llvm-5d6c43e2942894b1183041ba5cb00d413ae484d4.zip |
[FastISel][AArch64] Add support for frameaddress intrinsic.
This commit implements the frameaddress intrinsic for the AArch64 architecture
in FastISel.
There were two test cases that pretty much tested the same, so I combined them
to a single test case.
Fixes <rdar://problem/17811834>
llvm-svn: 213959
Diffstat (limited to 'llvm/lib/Target/AArch64/AArch64FastISel.cpp')
-rw-r--r-- | llvm/lib/Target/AArch64/AArch64FastISel.cpp | 30 |
1 files changed, 28 insertions, 2 deletions
diff --git a/llvm/lib/Target/AArch64/AArch64FastISel.cpp b/llvm/lib/Target/AArch64/AArch64FastISel.cpp index 8f4fac9a56b..13312433e2d 100644 --- a/llvm/lib/Target/AArch64/AArch64FastISel.cpp +++ b/llvm/lib/Target/AArch64/AArch64FastISel.cpp @@ -1438,8 +1438,34 @@ bool AArch64FastISel::TryEmitSmallMemCpy(Address Dest, Address Src, bool AArch64FastISel::FastLowerIntrinsicCall(const IntrinsicInst *II) { // FIXME: Handle more intrinsics. switch (II->getIntrinsicID()) { - default: - return false; + default: return false; + case Intrinsic::frameaddress: { + MachineFrameInfo *MFI = FuncInfo.MF->getFrameInfo(); + MFI->setFrameAddressIsTaken(true); + + const AArch64RegisterInfo *RegInfo = + static_cast<const AArch64RegisterInfo *>(TM.getRegisterInfo()); + unsigned FramePtr = RegInfo->getFrameRegister(*(FuncInfo.MF)); + unsigned SrcReg = FramePtr; + + // Recursively load frame address + // ldr x0, [fp] + // ldr x0, [x0] + // ldr x0, [x0] + // ... + unsigned DestReg; + unsigned Depth = cast<ConstantInt>(II->getOperand(0))->getZExtValue(); + while (Depth--) { + DestReg = createResultReg(&AArch64::GPR64RegClass); + BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, + TII.get(AArch64::LDRXui), DestReg) + .addReg(SrcReg).addImm(0); + SrcReg = DestReg; + } + + UpdateValueMap(II, SrcReg); + return true; + } case Intrinsic::memcpy: case Intrinsic::memmove: { const auto *MTI = cast<MemTransferInst>(II); |